altera_spi.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Altera SPI driver
  4. *
  5. * based on bfin_spi.c
  6. * Copyright (c) 2005-2008 Analog Devices Inc.
  7. * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
  8. */
  9. #include <common.h>
  10. #include <dm.h>
  11. #include <errno.h>
  12. #include <log.h>
  13. #include <malloc.h>
  14. #include <fdtdec.h>
  15. #include <spi.h>
  16. #include <asm/io.h>
  17. #include <linux/bitops.h>
  18. #define ALTERA_SPI_STATUS_RRDY_MSK BIT(7)
  19. #define ALTERA_SPI_CONTROL_SSO_MSK BIT(10)
  20. #ifndef CONFIG_ALTERA_SPI_IDLE_VAL
  21. #define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
  22. #endif
  23. struct altera_spi_regs {
  24. u32 rxdata;
  25. u32 txdata;
  26. u32 status;
  27. u32 control;
  28. u32 _reserved;
  29. u32 slave_sel;
  30. };
  31. struct altera_spi_plat {
  32. struct altera_spi_regs *regs;
  33. };
  34. struct altera_spi_priv {
  35. struct altera_spi_regs *regs;
  36. };
  37. static void spi_cs_activate(struct udevice *dev, uint cs)
  38. {
  39. struct udevice *bus = dev->parent;
  40. struct altera_spi_priv *priv = dev_get_priv(bus);
  41. struct altera_spi_regs *const regs = priv->regs;
  42. writel(1 << cs, &regs->slave_sel);
  43. writel(ALTERA_SPI_CONTROL_SSO_MSK, &regs->control);
  44. }
  45. static void spi_cs_deactivate(struct udevice *dev)
  46. {
  47. struct udevice *bus = dev->parent;
  48. struct altera_spi_priv *priv = dev_get_priv(bus);
  49. struct altera_spi_regs *const regs = priv->regs;
  50. writel(0, &regs->control);
  51. writel(0, &regs->slave_sel);
  52. }
  53. static int altera_spi_claim_bus(struct udevice *dev)
  54. {
  55. struct udevice *bus = dev->parent;
  56. struct altera_spi_priv *priv = dev_get_priv(bus);
  57. struct altera_spi_regs *const regs = priv->regs;
  58. writel(0, &regs->control);
  59. writel(0, &regs->slave_sel);
  60. return 0;
  61. }
  62. static int altera_spi_release_bus(struct udevice *dev)
  63. {
  64. struct udevice *bus = dev->parent;
  65. struct altera_spi_priv *priv = dev_get_priv(bus);
  66. struct altera_spi_regs *const regs = priv->regs;
  67. writel(0, &regs->slave_sel);
  68. return 0;
  69. }
  70. static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen,
  71. const void *dout, void *din, unsigned long flags)
  72. {
  73. struct udevice *bus = dev->parent;
  74. struct altera_spi_priv *priv = dev_get_priv(bus);
  75. struct altera_spi_regs *const regs = priv->regs;
  76. struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
  77. /* assume spi core configured to do 8 bit transfers */
  78. unsigned int bytes = bitlen / 8;
  79. const unsigned char *txp = dout;
  80. unsigned char *rxp = din;
  81. uint32_t reg, data, start;
  82. debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
  83. dev_seq(bus), slave_plat->cs, bitlen, bytes, flags);
  84. if (bitlen == 0)
  85. goto done;
  86. if (bitlen % 8) {
  87. flags |= SPI_XFER_END;
  88. goto done;
  89. }
  90. /* empty read buffer */
  91. if (readl(&regs->status) & ALTERA_SPI_STATUS_RRDY_MSK)
  92. readl(&regs->rxdata);
  93. if (flags & SPI_XFER_BEGIN)
  94. spi_cs_activate(dev, slave_plat->cs);
  95. while (bytes--) {
  96. if (txp)
  97. data = *txp++;
  98. else
  99. data = CONFIG_ALTERA_SPI_IDLE_VAL;
  100. debug("%s: tx:%x ", __func__, data);
  101. writel(data, &regs->txdata);
  102. start = get_timer(0);
  103. while (1) {
  104. reg = readl(&regs->status);
  105. if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
  106. break;
  107. if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
  108. debug("%s: Transmission timed out!\n", __func__);
  109. return -1;
  110. }
  111. }
  112. data = readl(&regs->rxdata);
  113. if (rxp)
  114. *rxp++ = data & 0xff;
  115. debug("rx:%x\n", data);
  116. }
  117. done:
  118. if (flags & SPI_XFER_END)
  119. spi_cs_deactivate(dev);
  120. return 0;
  121. }
  122. static int altera_spi_set_speed(struct udevice *bus, uint speed)
  123. {
  124. return 0;
  125. }
  126. static int altera_spi_set_mode(struct udevice *bus, uint mode)
  127. {
  128. return 0;
  129. }
  130. static int altera_spi_probe(struct udevice *bus)
  131. {
  132. struct altera_spi_plat *plat = dev_get_plat(bus);
  133. struct altera_spi_priv *priv = dev_get_priv(bus);
  134. priv->regs = plat->regs;
  135. return 0;
  136. }
  137. static int altera_spi_of_to_plat(struct udevice *bus)
  138. {
  139. struct altera_spi_plat *plat = dev_get_plat(bus);
  140. plat->regs = map_physmem(dev_read_addr(bus),
  141. sizeof(struct altera_spi_regs),
  142. MAP_NOCACHE);
  143. return 0;
  144. }
  145. static const struct dm_spi_ops altera_spi_ops = {
  146. .claim_bus = altera_spi_claim_bus,
  147. .release_bus = altera_spi_release_bus,
  148. .xfer = altera_spi_xfer,
  149. .set_speed = altera_spi_set_speed,
  150. .set_mode = altera_spi_set_mode,
  151. /*
  152. * cs_info is not needed, since we require all chip selects to be
  153. * in the device tree explicitly
  154. */
  155. };
  156. static const struct udevice_id altera_spi_ids[] = {
  157. { .compatible = "altr,spi-1.0" },
  158. {}
  159. };
  160. U_BOOT_DRIVER(altera_spi) = {
  161. .name = "altera_spi",
  162. .id = UCLASS_SPI,
  163. .of_match = altera_spi_ids,
  164. .ops = &altera_spi_ops,
  165. .of_to_plat = altera_spi_of_to_plat,
  166. .plat_auto = sizeof(struct altera_spi_plat),
  167. .priv_auto = sizeof(struct altera_spi_priv),
  168. .probe = altera_spi_probe,
  169. };