serial_sifive.c 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Anup Patel <anup@brainfault.org>
  4. */
  5. #include <common.h>
  6. #include <clk.h>
  7. #include <debug_uart.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <fdtdec.h>
  11. #include <log.h>
  12. #include <watchdog.h>
  13. #include <asm/global_data.h>
  14. #include <asm/io.h>
  15. #include <linux/compiler.h>
  16. #include <serial.h>
  17. #include <linux/err.h>
  18. DECLARE_GLOBAL_DATA_PTR;
  19. #define UART_TXFIFO_FULL 0x80000000
  20. #define UART_RXFIFO_EMPTY 0x80000000
  21. #define UART_RXFIFO_DATA 0x000000ff
  22. #define UART_TXCTRL_TXEN 0x1
  23. #define UART_RXCTRL_RXEN 0x1
  24. /* IP register */
  25. #define UART_IP_RXWM 0x2
  26. struct uart_sifive {
  27. u32 txfifo;
  28. u32 rxfifo;
  29. u32 txctrl;
  30. u32 rxctrl;
  31. u32 ie;
  32. u32 ip;
  33. u32 div;
  34. };
  35. struct sifive_uart_plat {
  36. unsigned long clock;
  37. struct uart_sifive *regs;
  38. };
  39. /**
  40. * Find minimum divisor divides in_freq to max_target_hz;
  41. * Based on uart driver n SiFive FSBL.
  42. *
  43. * f_baud = f_in / (div + 1) => div = (f_in / f_baud) - 1
  44. * The nearest integer solution requires rounding up as to not exceed
  45. * max_target_hz.
  46. * div = ceil(f_in / f_baud) - 1
  47. * = floor((f_in - 1 + f_baud) / f_baud) - 1
  48. * This should not overflow as long as (f_in - 1 + f_baud) does not exceed
  49. * 2^32 - 1, which is unlikely since we represent frequencies in kHz.
  50. */
  51. static inline unsigned int uart_min_clk_divisor(unsigned long in_freq,
  52. unsigned long max_target_hz)
  53. {
  54. unsigned long quotient =
  55. (in_freq + max_target_hz - 1) / (max_target_hz);
  56. /* Avoid underflow */
  57. if (quotient == 0)
  58. return 0;
  59. else
  60. return quotient - 1;
  61. }
  62. /* Set up the baud rate in gd struct */
  63. static void _sifive_serial_setbrg(struct uart_sifive *regs,
  64. unsigned long clock, unsigned long baud)
  65. {
  66. writel((uart_min_clk_divisor(clock, baud)), &regs->div);
  67. }
  68. static void _sifive_serial_init(struct uart_sifive *regs)
  69. {
  70. writel(UART_TXCTRL_TXEN, &regs->txctrl);
  71. writel(UART_RXCTRL_RXEN, &regs->rxctrl);
  72. writel(0, &regs->ie);
  73. }
  74. static int _sifive_serial_putc(struct uart_sifive *regs, const char c)
  75. {
  76. if (readl(&regs->txfifo) & UART_TXFIFO_FULL)
  77. return -EAGAIN;
  78. writel(c, &regs->txfifo);
  79. return 0;
  80. }
  81. static int _sifive_serial_getc(struct uart_sifive *regs)
  82. {
  83. int ch = readl(&regs->rxfifo);
  84. if (ch & UART_RXFIFO_EMPTY)
  85. return -EAGAIN;
  86. ch &= UART_RXFIFO_DATA;
  87. return ch;
  88. }
  89. static int sifive_serial_setbrg(struct udevice *dev, int baudrate)
  90. {
  91. int ret;
  92. struct clk clk;
  93. struct sifive_uart_plat *plat = dev_get_plat(dev);
  94. u32 clock = 0;
  95. ret = clk_get_by_index(dev, 0, &clk);
  96. if (IS_ERR_VALUE(ret)) {
  97. debug("SiFive UART failed to get clock\n");
  98. ret = dev_read_u32(dev, "clock-frequency", &clock);
  99. if (IS_ERR_VALUE(ret)) {
  100. debug("SiFive UART clock not defined\n");
  101. return 0;
  102. }
  103. } else {
  104. clock = clk_get_rate(&clk);
  105. if (IS_ERR_VALUE(clock)) {
  106. debug("SiFive UART clock get rate failed\n");
  107. return 0;
  108. }
  109. }
  110. plat->clock = clock;
  111. _sifive_serial_setbrg(plat->regs, plat->clock, baudrate);
  112. return 0;
  113. }
  114. static int sifive_serial_probe(struct udevice *dev)
  115. {
  116. struct sifive_uart_plat *plat = dev_get_plat(dev);
  117. /* No need to reinitialize the UART after relocation */
  118. if (gd->flags & GD_FLG_RELOC)
  119. return 0;
  120. _sifive_serial_init(plat->regs);
  121. return 0;
  122. }
  123. static int sifive_serial_getc(struct udevice *dev)
  124. {
  125. int c;
  126. struct sifive_uart_plat *plat = dev_get_plat(dev);
  127. struct uart_sifive *regs = plat->regs;
  128. while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ;
  129. return c;
  130. }
  131. static int sifive_serial_putc(struct udevice *dev, const char ch)
  132. {
  133. int rc;
  134. struct sifive_uart_plat *plat = dev_get_plat(dev);
  135. while ((rc = _sifive_serial_putc(plat->regs, ch)) == -EAGAIN) ;
  136. return rc;
  137. }
  138. static int sifive_serial_pending(struct udevice *dev, bool input)
  139. {
  140. struct sifive_uart_plat *plat = dev_get_plat(dev);
  141. struct uart_sifive *regs = plat->regs;
  142. if (input)
  143. return (readl(&regs->ip) & UART_IP_RXWM);
  144. else
  145. return !!(readl(&regs->txfifo) & UART_TXFIFO_FULL);
  146. }
  147. static int sifive_serial_of_to_plat(struct udevice *dev)
  148. {
  149. struct sifive_uart_plat *plat = dev_get_plat(dev);
  150. plat->regs = (struct uart_sifive *)(uintptr_t)dev_read_addr(dev);
  151. if (IS_ERR(plat->regs))
  152. return PTR_ERR(plat->regs);
  153. return 0;
  154. }
  155. static const struct dm_serial_ops sifive_serial_ops = {
  156. .putc = sifive_serial_putc,
  157. .getc = sifive_serial_getc,
  158. .pending = sifive_serial_pending,
  159. .setbrg = sifive_serial_setbrg,
  160. };
  161. static const struct udevice_id sifive_serial_ids[] = {
  162. { .compatible = "sifive,uart0" },
  163. { }
  164. };
  165. U_BOOT_DRIVER(serial_sifive) = {
  166. .name = "serial_sifive",
  167. .id = UCLASS_SERIAL,
  168. .of_match = sifive_serial_ids,
  169. .of_to_plat = sifive_serial_of_to_plat,
  170. .plat_auto = sizeof(struct sifive_uart_plat),
  171. .probe = sifive_serial_probe,
  172. .ops = &sifive_serial_ops,
  173. };
  174. #ifdef CONFIG_DEBUG_UART_SIFIVE
  175. static inline void _debug_uart_init(void)
  176. {
  177. struct uart_sifive *regs =
  178. (struct uart_sifive *)CONFIG_DEBUG_UART_BASE;
  179. _sifive_serial_setbrg(regs, CONFIG_DEBUG_UART_CLOCK,
  180. CONFIG_BAUDRATE);
  181. _sifive_serial_init(regs);
  182. }
  183. static inline void _debug_uart_putc(int ch)
  184. {
  185. struct uart_sifive *regs =
  186. (struct uart_sifive *)CONFIG_DEBUG_UART_BASE;
  187. while (_sifive_serial_putc(regs, ch) == -EAGAIN)
  188. WATCHDOG_RESET();
  189. }
  190. DEBUG_UART_FUNCS
  191. #endif