serial_s5p.c 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009 SAMSUNG Electronics
  4. * Minkyu Kang <mk7.kang@samsung.com>
  5. * Heungjun Kim <riverful.kim@samsung.com>
  6. *
  7. * based on drivers/serial/s3c64xx.c
  8. */
  9. #include <common.h>
  10. #include <dm.h>
  11. #include <errno.h>
  12. #include <fdtdec.h>
  13. #include <asm/global_data.h>
  14. #include <linux/compiler.h>
  15. #include <asm/io.h>
  16. #include <asm/arch/clk.h>
  17. #include <asm/arch/uart.h>
  18. #include <serial.h>
  19. #include <clk.h>
  20. DECLARE_GLOBAL_DATA_PTR;
  21. #define RX_FIFO_COUNT_SHIFT 0
  22. #define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT)
  23. #define RX_FIFO_FULL (1 << 8)
  24. #define TX_FIFO_COUNT_SHIFT 16
  25. #define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT)
  26. #define TX_FIFO_FULL (1 << 24)
  27. /* Information about a serial port */
  28. struct s5p_serial_plat {
  29. struct s5p_uart *reg; /* address of registers in physical memory */
  30. u8 port_id; /* uart port number */
  31. };
  32. /*
  33. * The coefficient, used to calculate the baudrate on S5P UARTs is
  34. * calculated as
  35. * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
  36. * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
  37. * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
  38. */
  39. static const int udivslot[] = {
  40. 0,
  41. 0x0080,
  42. 0x0808,
  43. 0x0888,
  44. 0x2222,
  45. 0x4924,
  46. 0x4a52,
  47. 0x54aa,
  48. 0x5555,
  49. 0xd555,
  50. 0xd5d5,
  51. 0xddd5,
  52. 0xdddd,
  53. 0xdfdd,
  54. 0xdfdf,
  55. 0xffdf,
  56. };
  57. static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
  58. {
  59. /* enable FIFOs, auto clear Rx FIFO */
  60. writel(0x3, &uart->ufcon);
  61. writel(0, &uart->umcon);
  62. /* 8N1 */
  63. writel(0x3, &uart->ulcon);
  64. /* No interrupts, no DMA, pure polling */
  65. writel(0x245, &uart->ucon);
  66. }
  67. static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
  68. int baudrate)
  69. {
  70. u32 val;
  71. val = uclk / baudrate;
  72. writel(val / 16 - 1, &uart->ubrdiv);
  73. if (s5p_uart_divslot())
  74. writew(udivslot[val % 16], &uart->rest.slot);
  75. else
  76. writeb(val % 16, &uart->rest.value);
  77. }
  78. #ifndef CONFIG_SPL_BUILD
  79. int s5p_serial_setbrg(struct udevice *dev, int baudrate)
  80. {
  81. struct s5p_serial_plat *plat = dev_get_plat(dev);
  82. struct s5p_uart *const uart = plat->reg;
  83. u32 uclk;
  84. #ifdef CONFIG_CLK_EXYNOS
  85. struct clk clk;
  86. u32 ret;
  87. ret = clk_get_by_index(dev, 1, &clk);
  88. if (ret < 0)
  89. return ret;
  90. uclk = clk_get_rate(&clk);
  91. #else
  92. uclk = get_uart_clk(plat->port_id);
  93. #endif
  94. s5p_serial_baud(uart, uclk, baudrate);
  95. return 0;
  96. }
  97. static int s5p_serial_probe(struct udevice *dev)
  98. {
  99. struct s5p_serial_plat *plat = dev_get_plat(dev);
  100. struct s5p_uart *const uart = plat->reg;
  101. s5p_serial_init(uart);
  102. return 0;
  103. }
  104. static int serial_err_check(const struct s5p_uart *const uart, int op)
  105. {
  106. unsigned int mask;
  107. /*
  108. * UERSTAT
  109. * Break Detect [3]
  110. * Frame Err [2] : receive operation
  111. * Parity Err [1] : receive operation
  112. * Overrun Err [0] : receive operation
  113. */
  114. if (op)
  115. mask = 0x8;
  116. else
  117. mask = 0xf;
  118. return readl(&uart->uerstat) & mask;
  119. }
  120. static int s5p_serial_getc(struct udevice *dev)
  121. {
  122. struct s5p_serial_plat *plat = dev_get_plat(dev);
  123. struct s5p_uart *const uart = plat->reg;
  124. if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
  125. return -EAGAIN;
  126. serial_err_check(uart, 0);
  127. return (int)(readb(&uart->urxh) & 0xff);
  128. }
  129. static int s5p_serial_putc(struct udevice *dev, const char ch)
  130. {
  131. struct s5p_serial_plat *plat = dev_get_plat(dev);
  132. struct s5p_uart *const uart = plat->reg;
  133. if (readl(&uart->ufstat) & TX_FIFO_FULL)
  134. return -EAGAIN;
  135. writeb(ch, &uart->utxh);
  136. serial_err_check(uart, 1);
  137. return 0;
  138. }
  139. static int s5p_serial_pending(struct udevice *dev, bool input)
  140. {
  141. struct s5p_serial_plat *plat = dev_get_plat(dev);
  142. struct s5p_uart *const uart = plat->reg;
  143. uint32_t ufstat = readl(&uart->ufstat);
  144. if (input)
  145. return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
  146. else
  147. return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
  148. }
  149. static int s5p_serial_of_to_plat(struct udevice *dev)
  150. {
  151. struct s5p_serial_plat *plat = dev_get_plat(dev);
  152. fdt_addr_t addr;
  153. addr = dev_read_addr(dev);
  154. if (addr == FDT_ADDR_T_NONE)
  155. return -EINVAL;
  156. plat->reg = (struct s5p_uart *)addr;
  157. plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
  158. "id", dev_seq(dev));
  159. return 0;
  160. }
  161. static const struct dm_serial_ops s5p_serial_ops = {
  162. .putc = s5p_serial_putc,
  163. .pending = s5p_serial_pending,
  164. .getc = s5p_serial_getc,
  165. .setbrg = s5p_serial_setbrg,
  166. };
  167. static const struct udevice_id s5p_serial_ids[] = {
  168. { .compatible = "samsung,exynos4210-uart" },
  169. { }
  170. };
  171. U_BOOT_DRIVER(serial_s5p) = {
  172. .name = "serial_s5p",
  173. .id = UCLASS_SERIAL,
  174. .of_match = s5p_serial_ids,
  175. .of_to_plat = s5p_serial_of_to_plat,
  176. .plat_auto = sizeof(struct s5p_serial_plat),
  177. .probe = s5p_serial_probe,
  178. .ops = &s5p_serial_ops,
  179. };
  180. #endif
  181. #ifdef CONFIG_DEBUG_UART_S5P
  182. #include <debug_uart.h>
  183. static inline void _debug_uart_init(void)
  184. {
  185. struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
  186. s5p_serial_init(uart);
  187. s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
  188. }
  189. static inline void _debug_uart_putc(int ch)
  190. {
  191. struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
  192. while (readl(&uart->ufstat) & TX_FIFO_FULL);
  193. writeb(ch, &uart->utxh);
  194. }
  195. DEBUG_UART_FUNCS
  196. #endif