serial_pic32.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (c) 2015 Paul Thacker <paul.thacker@microchip.com>
  4. *
  5. */
  6. #include <common.h>
  7. #include <clk.h>
  8. #include <dm.h>
  9. #include <malloc.h>
  10. #include <serial.h>
  11. #include <wait_bit.h>
  12. #include <asm/global_data.h>
  13. #include <linux/bitops.h>
  14. #include <mach/pic32.h>
  15. #include <dt-bindings/clock/microchip,clock.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. /* UART Control Registers */
  18. #define U_MOD 0x00
  19. #define U_MODCLR (U_MOD + _CLR_OFFSET)
  20. #define U_MODSET (U_MOD + _SET_OFFSET)
  21. #define U_STA 0x10
  22. #define U_STACLR (U_STA + _CLR_OFFSET)
  23. #define U_STASET (U_STA + _SET_OFFSET)
  24. #define U_TXR 0x20
  25. #define U_RXR 0x30
  26. #define U_BRG 0x40
  27. /* U_MOD bits */
  28. #define UART_ENABLE BIT(15)
  29. /* U_STA bits */
  30. #define UART_RX_ENABLE BIT(12)
  31. #define UART_TX_BRK BIT(11)
  32. #define UART_TX_ENABLE BIT(10)
  33. #define UART_TX_FULL BIT(9)
  34. #define UART_TX_EMPTY BIT(8)
  35. #define UART_RX_OVER BIT(1)
  36. #define UART_RX_DATA_AVAIL BIT(0)
  37. struct pic32_uart_priv {
  38. void __iomem *base;
  39. ulong uartclk;
  40. };
  41. /*
  42. * Initialize the serial port with the given baudrate.
  43. * The settings are always 8 data bits, no parity, 1 stop bit, no start bits.
  44. */
  45. static int pic32_serial_init(void __iomem *base, ulong clk, u32 baudrate)
  46. {
  47. u32 div = DIV_ROUND_CLOSEST(clk, baudrate * 16);
  48. /* wait for TX FIFO to empty */
  49. wait_for_bit_le32(base + U_STA, UART_TX_EMPTY,
  50. true, CONFIG_SYS_HZ, false);
  51. /* send break */
  52. writel(UART_TX_BRK, base + U_STASET);
  53. /* disable and clear mode */
  54. writel(0, base + U_MOD);
  55. writel(0, base + U_STA);
  56. /* set baud rate generator */
  57. writel(div - 1, base + U_BRG);
  58. /* enable the UART for TX and RX */
  59. writel(UART_TX_ENABLE | UART_RX_ENABLE, base + U_STASET);
  60. /* enable the UART */
  61. writel(UART_ENABLE, base + U_MODSET);
  62. return 0;
  63. }
  64. /* Check whether any char pending in RX fifo */
  65. static int pic32_uart_pending_input(void __iomem *base)
  66. {
  67. /* check if rx buffer overrun error has occurred */
  68. if (readl(base + U_STA) & UART_RX_OVER) {
  69. readl(base + U_RXR);
  70. /* clear overrun error to keep receiving */
  71. writel(UART_RX_OVER, base + U_STACLR);
  72. }
  73. /* In PIC32 there is no way to know number of outstanding
  74. * chars in rx-fifo. Only it can be known whether there is any.
  75. */
  76. return readl(base + U_STA) & UART_RX_DATA_AVAIL;
  77. }
  78. static int pic32_uart_pending(struct udevice *dev, bool input)
  79. {
  80. struct pic32_uart_priv *priv = dev_get_priv(dev);
  81. if (input)
  82. return pic32_uart_pending_input(priv->base);
  83. return !(readl(priv->base + U_STA) & UART_TX_EMPTY);
  84. }
  85. static int pic32_uart_setbrg(struct udevice *dev, int baudrate)
  86. {
  87. struct pic32_uart_priv *priv = dev_get_priv(dev);
  88. return pic32_serial_init(priv->base, priv->uartclk, baudrate);
  89. }
  90. static int pic32_uart_putc(struct udevice *dev, const char ch)
  91. {
  92. struct pic32_uart_priv *priv = dev_get_priv(dev);
  93. /* Check if Tx FIFO is full */
  94. if (readl(priv->base + U_STA) & UART_TX_FULL)
  95. return -EAGAIN;
  96. /* pump the char to tx buffer */
  97. writel(ch, priv->base + U_TXR);
  98. return 0;
  99. }
  100. static int pic32_uart_getc(struct udevice *dev)
  101. {
  102. struct pic32_uart_priv *priv = dev_get_priv(dev);
  103. /* return error if RX fifo is empty */
  104. if (!pic32_uart_pending_input(priv->base))
  105. return -EAGAIN;
  106. /* read the character from rx buffer */
  107. return readl(priv->base + U_RXR) & 0xff;
  108. }
  109. static int pic32_uart_probe(struct udevice *dev)
  110. {
  111. struct pic32_uart_priv *priv = dev_get_priv(dev);
  112. struct clk clk;
  113. fdt_addr_t addr;
  114. fdt_size_t size;
  115. int ret;
  116. /* get address */
  117. addr = fdtdec_get_addr_size(gd->fdt_blob, dev_of_offset(dev), "reg",
  118. &size);
  119. if (addr == FDT_ADDR_T_NONE)
  120. return -EINVAL;
  121. priv->base = ioremap(addr, size);
  122. /* get clock rate */
  123. ret = clk_get_by_index(dev, 0, &clk);
  124. if (ret < 0)
  125. return ret;
  126. priv->uartclk = clk_get_rate(&clk);
  127. clk_free(&clk);
  128. /* initialize serial */
  129. return pic32_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);
  130. }
  131. static const struct dm_serial_ops pic32_uart_ops = {
  132. .putc = pic32_uart_putc,
  133. .pending = pic32_uart_pending,
  134. .getc = pic32_uart_getc,
  135. .setbrg = pic32_uart_setbrg,
  136. };
  137. static const struct udevice_id pic32_uart_ids[] = {
  138. { .compatible = "microchip,pic32mzda-uart" },
  139. {}
  140. };
  141. U_BOOT_DRIVER(pic32_serial) = {
  142. .name = "pic32-uart",
  143. .id = UCLASS_SERIAL,
  144. .of_match = pic32_uart_ids,
  145. .probe = pic32_uart_probe,
  146. .ops = &pic32_uart_ops,
  147. .priv_auto = sizeof(struct pic32_uart_priv),
  148. };
  149. #ifdef CONFIG_DEBUG_UART_PIC32
  150. #include <debug_uart.h>
  151. static inline void _debug_uart_init(void)
  152. {
  153. void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
  154. pic32_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
  155. }
  156. static inline void _debug_uart_putc(int ch)
  157. {
  158. writel(ch, CONFIG_DEBUG_UART_BASE + U_TXR);
  159. }
  160. DEBUG_UART_FUNCS
  161. #endif