serial_octeon_bootcmd.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2019 Marvell International Ltd.
  4. * Copyright (C) 2021 Stefan Roese <sr@denx.de>
  5. */
  6. #include <dm.h>
  7. #include <dm/uclass.h>
  8. #include <errno.h>
  9. #include <input.h>
  10. #include <iomux.h>
  11. #include <log.h>
  12. #include <serial.h>
  13. #include <stdio_dev.h>
  14. #include <string.h>
  15. #include <watchdog.h>
  16. #include <linux/delay.h>
  17. #include <asm/addrspace.h>
  18. #include <asm/io.h>
  19. #include <mach/cvmx-regs.h>
  20. #include <mach/cvmx-bootmem.h>
  21. #define DRIVER_NAME "pci-bootcmd"
  22. /*
  23. * Important:
  24. * This address cannot be changed as the PCI console tool relies on exactly
  25. * this value!
  26. */
  27. #define BOOTLOADER_PCI_READ_BUFFER_BASE 0x6c000
  28. #define BOOTLOADER_PCI_READ_BUFFER_SIZE 256
  29. #define BOOTLOADER_PCI_WRITE_BUFFER_SIZE 256
  30. #define BOOTLOADER_PCI_READ_BUFFER_STR_LEN \
  31. (BOOTLOADER_PCI_READ_BUFFER_SIZE - 8)
  32. #define BOOTLOADER_PCI_WRITE_BUFFER_STR_LEN \
  33. (BOOTLOADER_PCI_WRITE_BUFFER_SIZE - 8)
  34. #define BOOTLOADER_PCI_READ_BUFFER_OWNER_ADDR \
  35. (BOOTLOADER_PCI_READ_BUFFER_BASE + 0)
  36. #define BOOTLOADER_PCI_READ_BUFFER_LEN_ADDR \
  37. (BOOTLOADER_PCI_READ_BUFFER_BASE + 4)
  38. #define BOOTLOADER_PCI_READ_BUFFER_DATA_ADDR \
  39. (BOOTLOADER_PCI_READ_BUFFER_BASE + 8)
  40. enum octeon_pci_io_buf_owner {
  41. /* Must be zero, set when memory cleared */
  42. OCTEON_PCI_IO_BUF_OWNER_INVALID = 0,
  43. OCTEON_PCI_IO_BUF_OWNER_OCTEON = 1,
  44. OCTEON_PCI_IO_BUF_OWNER_HOST = 2,
  45. };
  46. /* Structure for bootloader PCI IO buffers */
  47. struct octeon_pci_io_buf {
  48. u32 owner;
  49. u32 len;
  50. char data[0];
  51. };
  52. struct octeon_bootcmd_priv {
  53. bool started;
  54. int copy_offset;
  55. bool eol;
  56. bool unlocked;
  57. struct octeon_pci_io_buf *buf;
  58. };
  59. static int octeon_bootcmd_pending(struct udevice *dev, bool input)
  60. {
  61. struct octeon_bootcmd_priv *priv = dev_get_priv(dev);
  62. if (!input)
  63. return 0;
  64. if (priv->eol)
  65. return 1;
  66. CVMX_SYNC;
  67. if (priv->buf->owner != OCTEON_PCI_IO_BUF_OWNER_OCTEON)
  68. return 0;
  69. if (priv->buf->len > priv->copy_offset &&
  70. (priv->buf->data[priv->copy_offset] != '\0'))
  71. return 1;
  72. return 0;
  73. }
  74. static int octeon_bootcmd_getc(struct udevice *dev)
  75. {
  76. struct octeon_bootcmd_priv *priv = dev_get_priv(dev);
  77. char c;
  78. /* There's no EOL for boot commands so we fake it. */
  79. if (priv->eol) {
  80. priv->eol = false;
  81. return '\n';
  82. }
  83. while (!octeon_bootcmd_pending(dev, true)) {
  84. WATCHDOG_RESET();
  85. /*
  86. * ToDo:
  87. * The original code calls octeon_board_poll() here. We may
  88. * need to implement something similar here.
  89. */
  90. udelay(100);
  91. }
  92. c = priv->buf->data[priv->copy_offset];
  93. priv->buf->data[priv->copy_offset++] = '\0';
  94. if (priv->copy_offset >= min_t(int, CONFIG_SYS_CBSIZE - 1,
  95. BOOTLOADER_PCI_READ_BUFFER_STR_LEN - 1) ||
  96. (priv->buf->data[priv->copy_offset] == '\0')) {
  97. priv->copy_offset = 0;
  98. priv->buf->len = 0;
  99. priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST;
  100. priv->eol = true;
  101. CVMX_SYNC;
  102. }
  103. return c;
  104. }
  105. static const struct dm_serial_ops octeon_bootcmd_ops = {
  106. .getc = octeon_bootcmd_getc,
  107. .pending = octeon_bootcmd_pending,
  108. };
  109. static int octeon_bootcmd_probe(struct udevice *dev)
  110. {
  111. struct octeon_bootcmd_priv *priv = dev_get_priv(dev);
  112. priv->buf = (void *)CKSEG0ADDR(BOOTLOADER_PCI_READ_BUFFER_BASE);
  113. memset(priv->buf, 0, BOOTLOADER_PCI_READ_BUFFER_SIZE);
  114. priv->eol = false;
  115. /*
  116. * When the bootcmd console is first started it is started as locked to
  117. * block any calls sending a command until U-Boot is ready to accept
  118. * commands. Just before the main loop starts to accept commands the
  119. * bootcmd console is unlocked.
  120. */
  121. if (priv->unlocked)
  122. priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST;
  123. else
  124. priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_OCTEON;
  125. debug("%s called, buffer ptr: 0x%p, owner: %s\n", __func__,
  126. priv->buf,
  127. priv->buf->owner == OCTEON_PCI_IO_BUF_OWNER_HOST ?
  128. "host" : "octeon");
  129. debug("&priv->copy_offset: 0x%p\n", &priv->copy_offset);
  130. CVMX_SYNC;
  131. /*
  132. * Perhaps reinvestige this: In the original code, "unlocked" etc
  133. * is set in the octeon_pci_bootcmd_unlock() function called very
  134. * late.
  135. */
  136. priv->buf->owner = OCTEON_PCI_IO_BUF_OWNER_HOST;
  137. priv->unlocked = true;
  138. priv->started = true;
  139. CVMX_SYNC;
  140. return 0;
  141. }
  142. static const struct udevice_id octeon_bootcmd_serial_id[] = {
  143. { .compatible = "marvell,pci-bootcmd", },
  144. { },
  145. };
  146. U_BOOT_DRIVER(octeon_bootcmd) = {
  147. .name = DRIVER_NAME,
  148. .id = UCLASS_SERIAL,
  149. .ops = &octeon_bootcmd_ops,
  150. .of_match = of_match_ptr(octeon_bootcmd_serial_id),
  151. .probe = octeon_bootcmd_probe,
  152. .priv_auto = sizeof(struct octeon_bootcmd_priv),
  153. };