serial_cortina.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2020 Cortina-Access Ltd.
  4. * Common UART Driver for Cortina Access CAxxxx line of SoCs
  5. *
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <watchdog.h>
  11. #include <asm/io.h>
  12. #include <serial.h>
  13. #include <linux/bitops.h>
  14. #include <linux/compiler.h>
  15. /* Register definitions */
  16. #define UCFG 0x00 /* UART config register */
  17. #define UFC 0x04 /* Flow Control */
  18. #define URX_SAMPLE 0x08 /* UART RX Sample register */
  19. #define URT_TUNE 0x0C /* Fine tune of UART clk */
  20. #define UTX_DATA 0x10 /* UART TX Character data */
  21. #define URX_DATA 0x14 /* UART RX Character data */
  22. #define UINFO 0x18 /* UART Info */
  23. #define UINT_EN0 0x1C /* UART Interrupt enable 0 */
  24. #define UINT_EN1 0x20 /* UART Interrupt enable 1 */
  25. #define UINT0 0x24 /* UART Interrupt 0 setting/clearing */
  26. #define UINT1 0x28 /* UART Interrupt 1 setting/clearing */
  27. #define UINT_STAT 0x2C /* UART Interrupt Status */
  28. /* UART Control Register Bit Fields */
  29. #define UCFG_BAUD_COUNT_MASK 0xFFFFFF00
  30. #define UCFG_BAUD_COUNT(x) ((x << 8) & UCFG_BAUD_COUNT_MASK)
  31. #define UCFG_EN BIT(7)
  32. #define UCFG_RX_EN BIT(6)
  33. #define UCFG_TX_EN BIT(5)
  34. #define UCFG_PARITY_EN BIT(4)
  35. #define UCFG_PARITY_SEL BIT(3)
  36. #define UCFG_2STOP_BIT BIT(2)
  37. #define UCFG_CNT1 BIT(1)
  38. #define UCFG_CNT0 BIT(0)
  39. #define UCFG_CHAR_5 0
  40. #define UCFG_CHAR_6 1
  41. #define UCFG_CHAR_7 2
  42. #define UCFG_CHAR_8 3
  43. #define UINFO_TX_FIFO_EMPTY BIT(3)
  44. #define UINFO_TX_FIFO_FULL BIT(2)
  45. #define UINFO_RX_FIFO_EMPTY BIT(1)
  46. #define UINFO_RX_FIFO_FULL BIT(0)
  47. #define UINT_RX_NON_EMPTY BIT(6)
  48. #define UINT_TX_EMPTY BIT(5)
  49. #define UINT_RX_UNDERRUN BIT(4)
  50. #define UINT_RX_OVERRUN BIT(3)
  51. #define UINT_RX_PARITY_ERR BIT(2)
  52. #define UINT_RX_STOP_ERR BIT(1)
  53. #define UINT_TX_OVERRUN BIT(0)
  54. #define UINT_MASK_ALL 0x7F
  55. struct ca_uart_priv {
  56. void __iomem *base;
  57. };
  58. int ca_serial_setbrg(struct udevice *dev, int baudrate)
  59. {
  60. struct ca_uart_priv *priv = dev_get_priv(dev);
  61. unsigned int uart_ctrl, baud, sample;
  62. baud = CORTINA_UART_CLOCK / baudrate;
  63. uart_ctrl = readl(priv->base + UCFG);
  64. uart_ctrl &= ~UCFG_BAUD_COUNT_MASK;
  65. uart_ctrl |= UCFG_BAUD_COUNT(baud);
  66. writel(uart_ctrl, priv->base + UCFG);
  67. sample = baud / 2;
  68. sample = (sample < 7) ? 7 : sample;
  69. writel(sample, priv->base + URX_SAMPLE);
  70. return 0;
  71. }
  72. static int ca_serial_getc(struct udevice *dev)
  73. {
  74. struct ca_uart_priv *priv = dev_get_priv(dev);
  75. int ch;
  76. ch = readl(priv->base + URX_DATA) & 0xFF;
  77. return (int)ch;
  78. }
  79. static int ca_serial_putc(struct udevice *dev, const char ch)
  80. {
  81. struct ca_uart_priv *priv = dev_get_priv(dev);
  82. unsigned int status;
  83. /* Retry if TX FIFO full */
  84. status = readl(priv->base + UINFO);
  85. if (status & UINFO_TX_FIFO_FULL)
  86. return -EAGAIN;
  87. writel(ch, priv->base + UTX_DATA);
  88. return 0;
  89. }
  90. static int ca_serial_pending(struct udevice *dev, bool input)
  91. {
  92. struct ca_uart_priv *priv = dev_get_priv(dev);
  93. unsigned int status;
  94. status = readl(priv->base + UINFO);
  95. if (input)
  96. return (status & UINFO_RX_FIFO_EMPTY) ? 0 : 1;
  97. else
  98. return (status & UINFO_TX_FIFO_FULL) ? 1 : 0;
  99. }
  100. static int ca_serial_probe(struct udevice *dev)
  101. {
  102. struct ca_uart_priv *priv = dev_get_priv(dev);
  103. u32 uart_ctrl;
  104. /* Set data, parity and stop bits */
  105. uart_ctrl = UCFG_EN | UCFG_TX_EN | UCFG_RX_EN | UCFG_CHAR_8;
  106. writel(uart_ctrl, priv->base + UCFG);
  107. return 0;
  108. }
  109. static int ca_serial_of_to_plat(struct udevice *dev)
  110. {
  111. struct ca_uart_priv *priv = dev_get_priv(dev);
  112. priv->base = dev_remap_addr_index(dev, 0);
  113. if (!priv->base)
  114. return -ENOENT;
  115. return 0;
  116. }
  117. static const struct dm_serial_ops ca_serial_ops = {
  118. .putc = ca_serial_putc,
  119. .pending = ca_serial_pending,
  120. .getc = ca_serial_getc,
  121. .setbrg = ca_serial_setbrg,
  122. };
  123. static const struct udevice_id ca_serial_ids[] = {
  124. {.compatible = "cortina,ca-uart"},
  125. {}
  126. };
  127. U_BOOT_DRIVER(serial_cortina) = {
  128. .name = "serial_cortina",
  129. .id = UCLASS_SERIAL,
  130. .of_match = ca_serial_ids,
  131. .of_to_plat = ca_serial_of_to_plat,
  132. .priv_auto = sizeof(struct ca_uart_priv),
  133. .probe = ca_serial_probe,
  134. .ops = &ca_serial_ops
  135. };