lpc32xx_hsuart.c 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
  4. */
  5. #include <common.h>
  6. #include <clock_legacy.h>
  7. #include <dm.h>
  8. #include <serial.h>
  9. #include <dm/platform_data/lpc32xx_hsuart.h>
  10. #include <asm/arch/uart.h>
  11. #include <linux/compiler.h>
  12. struct lpc32xx_hsuart_priv {
  13. struct hsuart_regs *hsuart;
  14. };
  15. static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
  16. {
  17. struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
  18. struct hsuart_regs *hsuart = priv->hsuart;
  19. u32 div;
  20. /* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
  21. div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
  22. if (div > 255)
  23. div = 255;
  24. writel(div, &hsuart->rate);
  25. return 0;
  26. }
  27. static int lpc32xx_serial_getc(struct udevice *dev)
  28. {
  29. struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
  30. struct hsuart_regs *hsuart = priv->hsuart;
  31. if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
  32. return -EAGAIN;
  33. return readl(&hsuart->rx) & HSUART_RX_DATA;
  34. }
  35. static int lpc32xx_serial_putc(struct udevice *dev, const char c)
  36. {
  37. struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
  38. struct hsuart_regs *hsuart = priv->hsuart;
  39. /* Wait for empty FIFO */
  40. if (readl(&hsuart->level) & HSUART_LEVEL_TX)
  41. return -EAGAIN;
  42. writel(c, &hsuart->tx);
  43. return 0;
  44. }
  45. static int lpc32xx_serial_pending(struct udevice *dev, bool input)
  46. {
  47. struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
  48. struct hsuart_regs *hsuart = priv->hsuart;
  49. if (input) {
  50. if (readl(&hsuart->level) & HSUART_LEVEL_RX)
  51. return 1;
  52. } else {
  53. if (readl(&hsuart->level) & HSUART_LEVEL_TX)
  54. return 1;
  55. }
  56. return 0;
  57. }
  58. static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
  59. {
  60. /* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
  61. writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
  62. HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
  63. &hsuart->ctrl);
  64. return 0;
  65. }
  66. static int lpc32xx_hsuart_probe(struct udevice *dev)
  67. {
  68. struct lpc32xx_hsuart_plat *plat = dev_get_plat(dev);
  69. struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
  70. priv->hsuart = (struct hsuart_regs *)plat->base;
  71. lpc32xx_serial_init(priv->hsuart);
  72. return 0;
  73. }
  74. static const struct dm_serial_ops lpc32xx_hsuart_ops = {
  75. .setbrg = lpc32xx_serial_setbrg,
  76. .getc = lpc32xx_serial_getc,
  77. .putc = lpc32xx_serial_putc,
  78. .pending = lpc32xx_serial_pending,
  79. };
  80. U_BOOT_DRIVER(lpc32xx_hsuart) = {
  81. .name = "lpc32xx_hsuart",
  82. .id = UCLASS_SERIAL,
  83. .probe = lpc32xx_hsuart_probe,
  84. .ops = &lpc32xx_hsuart_ops,
  85. .priv_auto = sizeof(struct lpc32xx_hsuart_priv),
  86. .flags = DM_FLAG_PRE_RELOC,
  87. };