atmel_usart.c 7.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2004-2006 Atmel Corporation
  4. *
  5. * Modified to support C structur SoC access by
  6. * Andreas Bießmann <biessmann@corscience.de>
  7. */
  8. #include <common.h>
  9. #include <clk.h>
  10. #include <dm.h>
  11. #include <errno.h>
  12. #include <malloc.h>
  13. #include <watchdog.h>
  14. #include <serial.h>
  15. #include <debug_uart.h>
  16. #include <asm/global_data.h>
  17. #include <linux/compiler.h>
  18. #include <linux/delay.h>
  19. #include <asm/io.h>
  20. #ifdef CONFIG_DM_SERIAL
  21. #include <asm/arch/atmel_serial.h>
  22. #endif
  23. #include <asm/arch/clk.h>
  24. #include <asm/arch/hardware.h>
  25. #include "atmel_usart.h"
  26. DECLARE_GLOBAL_DATA_PTR;
  27. #ifndef CONFIG_DM_SERIAL
  28. static void atmel_serial_setbrg_internal(atmel_usart3_t *usart, int id,
  29. int baudrate)
  30. {
  31. unsigned long divisor;
  32. unsigned long usart_hz;
  33. /*
  34. * Master Clock
  35. * Baud Rate = --------------
  36. * 16 * CD
  37. */
  38. usart_hz = get_usart_clk_rate(id);
  39. divisor = (usart_hz / 16 + baudrate / 2) / baudrate;
  40. writel(USART3_BF(CD, divisor), &usart->brgr);
  41. }
  42. static void atmel_serial_init_internal(atmel_usart3_t *usart)
  43. {
  44. /*
  45. * Just in case: drain transmitter register
  46. * 1000us is enough for baudrate >= 9600
  47. */
  48. if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
  49. __udelay(1000);
  50. writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
  51. }
  52. static void atmel_serial_activate(atmel_usart3_t *usart)
  53. {
  54. writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
  55. | USART3_BF(USCLKS, USART3_USCLKS_MCK)
  56. | USART3_BF(CHRL, USART3_CHRL_8)
  57. | USART3_BF(PAR, USART3_PAR_NONE)
  58. | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
  59. &usart->mr);
  60. writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
  61. /* 100us is enough for the new settings to be settled */
  62. __udelay(100);
  63. }
  64. static void atmel_serial_setbrg(void)
  65. {
  66. atmel_serial_setbrg_internal((atmel_usart3_t *)CONFIG_USART_BASE,
  67. CONFIG_USART_ID, gd->baudrate);
  68. }
  69. static int atmel_serial_init(void)
  70. {
  71. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
  72. atmel_serial_init_internal(usart);
  73. serial_setbrg();
  74. atmel_serial_activate(usart);
  75. return 0;
  76. }
  77. static void atmel_serial_putc(char c)
  78. {
  79. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
  80. if (c == '\n')
  81. serial_putc('\r');
  82. while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
  83. writel(c, &usart->thr);
  84. }
  85. static int atmel_serial_getc(void)
  86. {
  87. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
  88. while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
  89. WATCHDOG_RESET();
  90. return readl(&usart->rhr);
  91. }
  92. static int atmel_serial_tstc(void)
  93. {
  94. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
  95. return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
  96. }
  97. static struct serial_device atmel_serial_drv = {
  98. .name = "atmel_serial",
  99. .start = atmel_serial_init,
  100. .stop = NULL,
  101. .setbrg = atmel_serial_setbrg,
  102. .putc = atmel_serial_putc,
  103. .puts = default_serial_puts,
  104. .getc = atmel_serial_getc,
  105. .tstc = atmel_serial_tstc,
  106. };
  107. void atmel_serial_initialize(void)
  108. {
  109. serial_register(&atmel_serial_drv);
  110. }
  111. __weak struct serial_device *default_serial_console(void)
  112. {
  113. return &atmel_serial_drv;
  114. }
  115. #endif
  116. #ifdef CONFIG_DM_SERIAL
  117. enum serial_clk_type {
  118. CLK_TYPE_NORMAL = 0,
  119. CLK_TYPE_DBGU,
  120. };
  121. struct atmel_serial_priv {
  122. atmel_usart3_t *usart;
  123. ulong usart_clk_rate;
  124. };
  125. static void _atmel_serial_set_brg(atmel_usart3_t *usart,
  126. ulong usart_clk_rate, int baudrate)
  127. {
  128. unsigned long divisor;
  129. divisor = (usart_clk_rate / 16 + baudrate / 2) / baudrate;
  130. writel(USART3_BF(CD, divisor), &usart->brgr);
  131. }
  132. void _atmel_serial_init(atmel_usart3_t *usart,
  133. ulong usart_clk_rate, int baudrate)
  134. {
  135. writel(USART3_BIT(RXDIS) | USART3_BIT(TXDIS), &usart->cr);
  136. writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL) |
  137. USART3_BF(USCLKS, USART3_USCLKS_MCK) |
  138. USART3_BF(CHRL, USART3_CHRL_8) |
  139. USART3_BF(PAR, USART3_PAR_NONE) |
  140. USART3_BF(NBSTOP, USART3_NBSTOP_1)), &usart->mr);
  141. _atmel_serial_set_brg(usart, usart_clk_rate, baudrate);
  142. writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
  143. writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
  144. }
  145. int atmel_serial_setbrg(struct udevice *dev, int baudrate)
  146. {
  147. struct atmel_serial_priv *priv = dev_get_priv(dev);
  148. _atmel_serial_set_brg(priv->usart, priv->usart_clk_rate, baudrate);
  149. return 0;
  150. }
  151. static int atmel_serial_getc(struct udevice *dev)
  152. {
  153. struct atmel_serial_priv *priv = dev_get_priv(dev);
  154. if (!(readl(&priv->usart->csr) & USART3_BIT(RXRDY)))
  155. return -EAGAIN;
  156. return readl(&priv->usart->rhr);
  157. }
  158. static int atmel_serial_putc(struct udevice *dev, const char ch)
  159. {
  160. struct atmel_serial_priv *priv = dev_get_priv(dev);
  161. if (!(readl(&priv->usart->csr) & USART3_BIT(TXRDY)))
  162. return -EAGAIN;
  163. writel(ch, &priv->usart->thr);
  164. return 0;
  165. }
  166. static int atmel_serial_pending(struct udevice *dev, bool input)
  167. {
  168. struct atmel_serial_priv *priv = dev_get_priv(dev);
  169. uint32_t csr = readl(&priv->usart->csr);
  170. if (input)
  171. return csr & USART3_BIT(RXRDY) ? 1 : 0;
  172. else
  173. return csr & USART3_BIT(TXEMPTY) ? 0 : 1;
  174. }
  175. static const struct dm_serial_ops atmel_serial_ops = {
  176. .putc = atmel_serial_putc,
  177. .pending = atmel_serial_pending,
  178. .getc = atmel_serial_getc,
  179. .setbrg = atmel_serial_setbrg,
  180. };
  181. #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_CLK)
  182. static int atmel_serial_enable_clk(struct udevice *dev)
  183. {
  184. struct atmel_serial_priv *priv = dev_get_priv(dev);
  185. /* Use fixed clock value in SPL */
  186. priv->usart_clk_rate = CONFIG_SPL_UART_CLOCK;
  187. return 0;
  188. }
  189. #else
  190. static int atmel_serial_enable_clk(struct udevice *dev)
  191. {
  192. struct atmel_serial_priv *priv = dev_get_priv(dev);
  193. struct clk clk;
  194. ulong clk_rate;
  195. int ret;
  196. ret = clk_get_by_index(dev, 0, &clk);
  197. if (ret)
  198. return -EINVAL;
  199. if (dev_get_driver_data(dev) == CLK_TYPE_NORMAL) {
  200. ret = clk_enable(&clk);
  201. if (ret)
  202. return ret;
  203. }
  204. clk_rate = clk_get_rate(&clk);
  205. if (!clk_rate)
  206. return -EINVAL;
  207. priv->usart_clk_rate = clk_rate;
  208. clk_free(&clk);
  209. return 0;
  210. }
  211. #endif
  212. static int atmel_serial_probe(struct udevice *dev)
  213. {
  214. struct atmel_serial_plat *plat = dev_get_plat(dev);
  215. struct atmel_serial_priv *priv = dev_get_priv(dev);
  216. int ret;
  217. #if CONFIG_IS_ENABLED(OF_CONTROL)
  218. fdt_addr_t addr_base;
  219. addr_base = dev_read_addr(dev);
  220. if (addr_base == FDT_ADDR_T_NONE)
  221. return -ENODEV;
  222. plat->base_addr = (uint32_t)addr_base;
  223. #endif
  224. priv->usart = (atmel_usart3_t *)plat->base_addr;
  225. ret = atmel_serial_enable_clk(dev);
  226. if (ret)
  227. return ret;
  228. _atmel_serial_init(priv->usart, priv->usart_clk_rate, gd->baudrate);
  229. return 0;
  230. }
  231. #if CONFIG_IS_ENABLED(OF_CONTROL)
  232. static const struct udevice_id atmel_serial_ids[] = {
  233. {
  234. .compatible = "atmel,at91sam9260-dbgu",
  235. .data = CLK_TYPE_DBGU,
  236. },
  237. {
  238. .compatible = "atmel,at91sam9260-usart",
  239. .data = CLK_TYPE_NORMAL,
  240. },
  241. { }
  242. };
  243. #endif
  244. U_BOOT_DRIVER(serial_atmel) = {
  245. .name = "serial_atmel",
  246. .id = UCLASS_SERIAL,
  247. #if CONFIG_IS_ENABLED(OF_CONTROL)
  248. .of_match = atmel_serial_ids,
  249. .plat_auto = sizeof(struct atmel_serial_plat),
  250. #endif
  251. .probe = atmel_serial_probe,
  252. .ops = &atmel_serial_ops,
  253. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  254. .flags = DM_FLAG_PRE_RELOC,
  255. #endif
  256. .priv_auto = sizeof(struct atmel_serial_priv),
  257. };
  258. #endif
  259. #ifdef CONFIG_DEBUG_UART_ATMEL
  260. static inline void _debug_uart_init(void)
  261. {
  262. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE;
  263. _atmel_serial_init(usart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
  264. }
  265. static inline void _debug_uart_putc(int ch)
  266. {
  267. atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE;
  268. while (!(readl(&usart->csr) & USART3_BIT(TXRDY)))
  269. ;
  270. writel(ch, &usart->thr);
  271. }
  272. DEBUG_UART_FUNCS
  273. #endif