sunxi_pwm.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2017-2018 Vasily Khoruzhick <anarsoul@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <div64.h>
  7. #include <dm.h>
  8. #include <log.h>
  9. #include <pwm.h>
  10. #include <regmap.h>
  11. #include <syscon.h>
  12. #include <asm/global_data.h>
  13. #include <asm/io.h>
  14. #include <asm/arch/pwm.h>
  15. #include <asm/arch/gpio.h>
  16. #include <power/regulator.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. #define OSC_24MHZ 24000000
  19. struct sunxi_pwm_priv {
  20. struct sunxi_pwm *regs;
  21. bool invert;
  22. u32 prescaler;
  23. };
  24. static const u32 prescaler_table[] = {
  25. 120, /* 0000 */
  26. 180, /* 0001 */
  27. 240, /* 0010 */
  28. 360, /* 0011 */
  29. 480, /* 0100 */
  30. 0, /* 0101 */
  31. 0, /* 0110 */
  32. 0, /* 0111 */
  33. 12000, /* 1000 */
  34. 24000, /* 1001 */
  35. 36000, /* 1010 */
  36. 48000, /* 1011 */
  37. 72000, /* 1100 */
  38. 0, /* 1101 */
  39. 0, /* 1110 */
  40. 1, /* 1111 */
  41. };
  42. static int sunxi_pwm_config_pinmux(void)
  43. {
  44. #ifdef CONFIG_MACH_SUN50I
  45. sunxi_gpio_set_cfgpin(SUNXI_GPD(22), SUNXI_GPD_PWM);
  46. #endif
  47. return 0;
  48. }
  49. static int sunxi_pwm_set_invert(struct udevice *dev, uint channel,
  50. bool polarity)
  51. {
  52. struct sunxi_pwm_priv *priv = dev_get_priv(dev);
  53. debug("%s: polarity=%u\n", __func__, polarity);
  54. priv->invert = polarity;
  55. return 0;
  56. }
  57. static int sunxi_pwm_set_config(struct udevice *dev, uint channel,
  58. uint period_ns, uint duty_ns)
  59. {
  60. struct sunxi_pwm_priv *priv = dev_get_priv(dev);
  61. struct sunxi_pwm *regs = priv->regs;
  62. int best_prescaler = 0;
  63. u32 v, best_period = 0, duty;
  64. u64 best_scaled_freq = 0;
  65. const u32 nsecs_per_sec = 1000000000U;
  66. debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns);
  67. for (int prescaler = 0; prescaler <= SUNXI_PWM_CTRL_PRESCALE0_MASK;
  68. prescaler++) {
  69. u32 period = 0;
  70. u64 scaled_freq = 0;
  71. if (!prescaler_table[prescaler])
  72. continue;
  73. scaled_freq = lldiv(OSC_24MHZ, prescaler_table[prescaler]);
  74. period = lldiv(scaled_freq * period_ns, nsecs_per_sec);
  75. if ((period - 1 <= SUNXI_PWM_CH0_PERIOD_MAX) &&
  76. best_period < period) {
  77. best_period = period;
  78. best_scaled_freq = scaled_freq;
  79. best_prescaler = prescaler;
  80. }
  81. }
  82. if (best_period - 1 > SUNXI_PWM_CH0_PERIOD_MAX) {
  83. debug("%s: failed to find prescaler value\n", __func__);
  84. return -EINVAL;
  85. }
  86. duty = lldiv(best_scaled_freq * duty_ns, nsecs_per_sec);
  87. if (priv->prescaler != best_prescaler) {
  88. /* Mask clock to update prescaler */
  89. v = readl(&regs->ctrl);
  90. v &= ~SUNXI_PWM_CTRL_CLK_GATE;
  91. writel(v, &regs->ctrl);
  92. v &= ~SUNXI_PWM_CTRL_PRESCALE0_MASK;
  93. v |= (best_prescaler & SUNXI_PWM_CTRL_PRESCALE0_MASK);
  94. writel(v, &regs->ctrl);
  95. v |= SUNXI_PWM_CTRL_CLK_GATE;
  96. writel(v, &regs->ctrl);
  97. priv->prescaler = best_prescaler;
  98. }
  99. writel(SUNXI_PWM_CH0_PERIOD_PRD(best_period) |
  100. SUNXI_PWM_CH0_PERIOD_DUTY(duty), &regs->ch0_period);
  101. debug("%s: prescaler: %d, period: %d, duty: %d\n",
  102. __func__, priv->prescaler,
  103. best_period, duty);
  104. return 0;
  105. }
  106. static int sunxi_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
  107. {
  108. struct sunxi_pwm_priv *priv = dev_get_priv(dev);
  109. struct sunxi_pwm *regs = priv->regs;
  110. u32 v;
  111. debug("%s: Enable '%s'\n", __func__, dev->name);
  112. v = readl(&regs->ctrl);
  113. if (!enable) {
  114. v &= ~SUNXI_PWM_CTRL_ENABLE0;
  115. writel(v, &regs->ctrl);
  116. return 0;
  117. }
  118. sunxi_pwm_config_pinmux();
  119. if (priv->invert)
  120. v &= ~SUNXI_PWM_CTRL_CH0_ACT_STA;
  121. else
  122. v |= SUNXI_PWM_CTRL_CH0_ACT_STA;
  123. v |= SUNXI_PWM_CTRL_ENABLE0;
  124. writel(v, &regs->ctrl);
  125. return 0;
  126. }
  127. static int sunxi_pwm_of_to_plat(struct udevice *dev)
  128. {
  129. struct sunxi_pwm_priv *priv = dev_get_priv(dev);
  130. priv->regs = dev_read_addr_ptr(dev);
  131. return 0;
  132. }
  133. static int sunxi_pwm_probe(struct udevice *dev)
  134. {
  135. return 0;
  136. }
  137. static const struct pwm_ops sunxi_pwm_ops = {
  138. .set_invert = sunxi_pwm_set_invert,
  139. .set_config = sunxi_pwm_set_config,
  140. .set_enable = sunxi_pwm_set_enable,
  141. };
  142. static const struct udevice_id sunxi_pwm_ids[] = {
  143. { .compatible = "allwinner,sun5i-a13-pwm" },
  144. { .compatible = "allwinner,sun50i-a64-pwm" },
  145. { }
  146. };
  147. U_BOOT_DRIVER(sunxi_pwm) = {
  148. .name = "sunxi_pwm",
  149. .id = UCLASS_PWM,
  150. .of_match = sunxi_pwm_ids,
  151. .ops = &sunxi_pwm_ops,
  152. .of_to_plat = sunxi_pwm_of_to_plat,
  153. .probe = sunxi_pwm_probe,
  154. .priv_auto = sizeof(struct sunxi_pwm_priv),
  155. };