stm32-vrefbuf.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
  5. *
  6. * Originally based on the Linux kernel v4.16 drivers/regulator/stm32-vrefbuf.c
  7. */
  8. #define LOG_CATEGORY UCLASS_REGULATOR
  9. #include <common.h>
  10. #include <clk.h>
  11. #include <dm.h>
  12. #include <asm/io.h>
  13. #include <dm/device_compat.h>
  14. #include <linux/bitops.h>
  15. #include <linux/iopoll.h>
  16. #include <linux/kernel.h>
  17. #include <power/regulator.h>
  18. /* STM32 VREFBUF registers */
  19. #define STM32_VREFBUF_CSR 0x00
  20. /* STM32 VREFBUF CSR bitfields */
  21. #define STM32_VRS GENMASK(6, 4)
  22. #define STM32_VRS_SHIFT 4
  23. #define STM32_VRR BIT(3)
  24. #define STM32_HIZ BIT(1)
  25. #define STM32_ENVR BIT(0)
  26. struct stm32_vrefbuf {
  27. void __iomem *base;
  28. struct clk clk;
  29. struct udevice *vdda_supply;
  30. };
  31. static const int stm32_vrefbuf_voltages[] = {
  32. /* Matches resp. VRS = 000b, 001b, 010b, 011b */
  33. 2500000, 2048000, 1800000, 1500000,
  34. };
  35. static int stm32_vrefbuf_set_enable(struct udevice *dev, bool enable)
  36. {
  37. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  38. u32 val;
  39. int ret;
  40. if (enable && !(readl(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR)) {
  41. /*
  42. * There maybe an overshoot:
  43. * - when disabling, then re-enabling vrefbuf too quickly
  44. * - or upon platform reset as external capacitor maybe slow
  45. * discharging (VREFBUF is HiZ at reset by default).
  46. * So force active discharge (HiZ=0) for 1ms before enabling.
  47. */
  48. clrbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_HIZ);
  49. udelay(1000);
  50. }
  51. clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR,
  52. enable ? STM32_ENVR : 0);
  53. if (!enable)
  54. return 0;
  55. /*
  56. * Vrefbuf startup time depends on external capacitor: wait here for
  57. * VRR to be set. That means output has reached expected value.
  58. * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as
  59. * arbitrary timeout.
  60. */
  61. ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
  62. val & STM32_VRR, 10000);
  63. if (ret < 0) {
  64. dev_err(dev, "stm32 vrefbuf timed out: %d\n", ret);
  65. clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR,
  66. STM32_HIZ);
  67. return ret;
  68. }
  69. return 0;
  70. }
  71. static int stm32_vrefbuf_get_enable(struct udevice *dev)
  72. {
  73. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  74. return readl(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
  75. }
  76. static int stm32_vrefbuf_set_value(struct udevice *dev, int uV)
  77. {
  78. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  79. unsigned int i;
  80. for (i = 0; i < ARRAY_SIZE(stm32_vrefbuf_voltages); i++) {
  81. if (uV == stm32_vrefbuf_voltages[i]) {
  82. clrsetbits_le32(priv->base + STM32_VREFBUF_CSR,
  83. STM32_VRS, i << STM32_VRS_SHIFT);
  84. return 0;
  85. }
  86. }
  87. return -EINVAL;
  88. }
  89. static int stm32_vrefbuf_get_value(struct udevice *dev)
  90. {
  91. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  92. u32 val;
  93. val = readl(priv->base + STM32_VREFBUF_CSR) & STM32_VRS;
  94. val >>= STM32_VRS_SHIFT;
  95. return stm32_vrefbuf_voltages[val];
  96. }
  97. static const struct dm_regulator_ops stm32_vrefbuf_ops = {
  98. .get_value = stm32_vrefbuf_get_value,
  99. .set_value = stm32_vrefbuf_set_value,
  100. .get_enable = stm32_vrefbuf_get_enable,
  101. .set_enable = stm32_vrefbuf_set_enable,
  102. };
  103. static int stm32_vrefbuf_probe(struct udevice *dev)
  104. {
  105. struct stm32_vrefbuf *priv = dev_get_priv(dev);
  106. int ret;
  107. priv->base = dev_read_addr_ptr(dev);
  108. ret = clk_get_by_index(dev, 0, &priv->clk);
  109. if (ret) {
  110. dev_err(dev, "Can't get clock: %d\n", ret);
  111. return ret;
  112. }
  113. ret = clk_enable(&priv->clk);
  114. if (ret) {
  115. dev_err(dev, "Can't enable clock: %d\n", ret);
  116. return ret;
  117. }
  118. ret = device_get_supply_regulator(dev, "vdda-supply",
  119. &priv->vdda_supply);
  120. if (ret) {
  121. dev_dbg(dev, "No vdda-supply: %d\n", ret);
  122. return 0;
  123. }
  124. ret = regulator_set_enable(priv->vdda_supply, true);
  125. if (ret) {
  126. dev_err(dev, "Can't enable vdda-supply: %d\n", ret);
  127. clk_disable(&priv->clk);
  128. }
  129. return ret;
  130. }
  131. static const struct udevice_id stm32_vrefbuf_ids[] = {
  132. { .compatible = "st,stm32-vrefbuf" },
  133. { }
  134. };
  135. U_BOOT_DRIVER(stm32_vrefbuf) = {
  136. .name = "stm32-vrefbuf",
  137. .id = UCLASS_REGULATOR,
  138. .of_match = stm32_vrefbuf_ids,
  139. .probe = stm32_vrefbuf_probe,
  140. .ops = &stm32_vrefbuf_ops,
  141. .priv_auto = sizeof(struct stm32_vrefbuf),
  142. };