pinctrl-mt7620.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
  4. *
  5. * Author: Weijie Gao <weijie.gao@mediatek.com>
  6. */
  7. #include <dm.h>
  8. #include <dm/pinctrl.h>
  9. #include <linux/bitops.h>
  10. #include <linux/io.h>
  11. #include "pinctrl-mtmips-common.h"
  12. #define SUTIF_SHIFT 30
  13. #define WDT_RST_SHIFT 21
  14. #define PA_G_SHIFT 20
  15. #define NAND_SD_SHIFT 18
  16. #define PERST_SHIFT 16
  17. #define EPHY_LED_SHIFT 15
  18. #define WLED_SHIFT 13
  19. #define SPI_CS1_SHIFT 12
  20. #define SPI_SHIFT 11
  21. #define RGMII2_SHIFT 10
  22. #define RGMII1_SHIFT 9
  23. #define MDIO_SHIFT 7
  24. #define UARTL_SHIFT 5
  25. #define UARTF_SHIFT 2
  26. #define I2C_SHIFT 0
  27. #define GM4_MASK 3
  28. #define GM8_MASK 7
  29. #if CONFIG_IS_ENABLED(PINMUX)
  30. static const struct mtmips_pmx_func sutif_grp[] = {
  31. FUNC("i2c", 2),
  32. FUNC("uartl", 1),
  33. FUNC("none", 0),
  34. };
  35. static const struct mtmips_pmx_func wdt_rst_grp[] = {
  36. FUNC("gpio", 2),
  37. FUNC("refclk", 1),
  38. FUNC("wdt rst", 0),
  39. };
  40. static const struct mtmips_pmx_func pa_g_grp[] = {
  41. FUNC("gpio", 1),
  42. FUNC("pa", 0),
  43. };
  44. static const struct mtmips_pmx_func nand_sd_grp[] = {
  45. FUNC("gpio", 2),
  46. FUNC("sd", 1),
  47. FUNC("nand", 0),
  48. };
  49. static const struct mtmips_pmx_func perst_grp[] = {
  50. FUNC("gpio", 2),
  51. FUNC("refclk", 1),
  52. FUNC("perst", 0),
  53. };
  54. static const struct mtmips_pmx_func ephy_led_grp[] = {
  55. FUNC("gpio", 1),
  56. FUNC("led", 0),
  57. };
  58. static const struct mtmips_pmx_func wled_grp[] = {
  59. FUNC("gpio", 1),
  60. FUNC("led", 0),
  61. };
  62. static const struct mtmips_pmx_func spi_cs1_grp[] = {
  63. FUNC("refclk", 1),
  64. FUNC("spi cs1", 0),
  65. };
  66. static const struct mtmips_pmx_func spi_grp[] = {
  67. FUNC("gpio", 1),
  68. FUNC("spi", 0),
  69. };
  70. static const struct mtmips_pmx_func rgmii2_grp[] = {
  71. FUNC("gpio", 1),
  72. FUNC("rgmii2", 0),
  73. };
  74. static const struct mtmips_pmx_func rgmii1_grp[] = {
  75. FUNC("gpio", 1),
  76. FUNC("rgmii1", 0),
  77. };
  78. static const struct mtmips_pmx_func mdio_grp[] = {
  79. FUNC("gpio", 2),
  80. FUNC("refclk", 1),
  81. FUNC("mdio", 0),
  82. };
  83. static const struct mtmips_pmx_func uartl_grp[] = {
  84. FUNC("gpio", 1),
  85. FUNC("uartl", 0),
  86. };
  87. static const struct mtmips_pmx_func uartf_grp[] = {
  88. FUNC("gpio", 7),
  89. FUNC("i2s gpio", 6),
  90. FUNC("uartf gpio", 5),
  91. FUNC("gpio pcm", 4),
  92. FUNC("i2s uartf", 3),
  93. FUNC("i2s pcm", 2),
  94. FUNC("uartf pcm", 1),
  95. FUNC("uartf", 0),
  96. };
  97. static const struct mtmips_pmx_func i2c_grp[] = {
  98. FUNC("gpio", 1),
  99. FUNC("i2c", 0),
  100. };
  101. static const struct mtmips_pmx_group mt7620_pinmux_data[] = {
  102. GRP("sutif", sutif_grp, 0, SUTIF_SHIFT, GM4_MASK),
  103. GRP("wdt rst", wdt_rst_grp, 0, WDT_RST_SHIFT, GM4_MASK),
  104. GRP("pa", pa_g_grp, 0, PA_G_SHIFT, 1),
  105. GRP("nand", nand_sd_grp, 0, NAND_SD_SHIFT, GM4_MASK),
  106. GRP("perst", perst_grp, 0, PERST_SHIFT, GM4_MASK),
  107. GRP("ephy led", ephy_led_grp, 0, EPHY_LED_SHIFT, 1),
  108. GRP("wled", wled_grp, 0, WLED_SHIFT, 1),
  109. GRP("spi cs1", spi_cs1_grp, 0, SPI_CS1_SHIFT, 1),
  110. GRP("spi", spi_grp, 0, SPI_SHIFT, 1),
  111. GRP("rgmii2", rgmii2_grp, 0, RGMII2_SHIFT, 1),
  112. GRP("rgmii1", rgmii1_grp, 0, RGMII1_SHIFT, 1),
  113. GRP("mdio", mdio_grp, 0, MDIO_SHIFT, GM4_MASK),
  114. GRP("uartl", uartl_grp, 0, UARTL_SHIFT, 1),
  115. GRP("uartf", uartf_grp, 0, UARTF_SHIFT, GM8_MASK),
  116. GRP("i2c", i2c_grp, 0, I2C_SHIFT, 1),
  117. };
  118. static int mt7620_get_groups_count(struct udevice *dev)
  119. {
  120. return ARRAY_SIZE(mt7620_pinmux_data);
  121. }
  122. static const char *mt7620_get_group_name(struct udevice *dev,
  123. unsigned int selector)
  124. {
  125. return mt7620_pinmux_data[selector].name;
  126. }
  127. #endif /* CONFIG_IS_ENABLED(PINMUX) */
  128. static int mt7620_pinctrl_probe(struct udevice *dev)
  129. {
  130. struct mtmips_pinctrl_priv *priv = dev_get_priv(dev);
  131. int ret = 0;
  132. #if CONFIG_IS_ENABLED(PINMUX)
  133. ret = mtmips_pinctrl_probe(priv, ARRAY_SIZE(mt7620_pinmux_data),
  134. mt7620_pinmux_data);
  135. #endif /* CONFIG_IS_ENABLED(PINMUX) */
  136. return ret;
  137. }
  138. static int mt7620_pinctrl_of_to_plat(struct udevice *dev)
  139. {
  140. struct mtmips_pinctrl_priv *priv = dev_get_priv(dev);
  141. priv->base = dev_remap_addr_index(dev, 0);
  142. if (!priv->base)
  143. return -EINVAL;
  144. return 0;
  145. }
  146. static const struct pinctrl_ops mt7620_pinctrl_ops = {
  147. #if CONFIG_IS_ENABLED(PINMUX)
  148. .get_groups_count = mt7620_get_groups_count,
  149. .get_group_name = mt7620_get_group_name,
  150. .get_functions_count = mtmips_get_functions_count,
  151. .get_function_name = mtmips_get_function_name,
  152. .pinmux_group_set = mtmips_pinmux_group_set,
  153. #endif /* CONFIG_IS_ENABLED(PINMUX) */
  154. .set_state = pinctrl_generic_set_state,
  155. };
  156. static const struct udevice_id mt7620_pinctrl_ids[] = {
  157. { .compatible = "mediatek,mt7620-pinctrl" },
  158. { }
  159. };
  160. U_BOOT_DRIVER(mt7620_pinctrl) = {
  161. .name = "mt7620-pinctrl",
  162. .id = UCLASS_PINCTRL,
  163. .of_match = mt7620_pinctrl_ids,
  164. .of_to_plat = mt7620_pinctrl_of_to_plat,
  165. .ops = &mt7620_pinctrl_ops,
  166. .probe = mt7620_pinctrl_probe,
  167. .priv_auto = sizeof(struct mtmips_pinctrl_priv),
  168. .flags = DM_FLAG_PRE_RELOC,
  169. };