pcie_ecam_generic.c 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Generic PCIE host provided by e.g. QEMU
  4. *
  5. * Heavily based on drivers/pci/pcie_xilinx.c
  6. *
  7. * Copyright (C) 2016 Imagination Technologies
  8. */
  9. #include <common.h>
  10. #include <dm.h>
  11. #include <pci.h>
  12. #include <asm/global_data.h>
  13. #include <asm/io.h>
  14. /**
  15. * struct generic_ecam_pcie - generic_ecam PCIe controller state
  16. * @cfg_base: The base address of memory mapped configuration space
  17. */
  18. struct generic_ecam_pcie {
  19. void *cfg_base;
  20. pci_size_t size;
  21. int first_busno;
  22. };
  23. /**
  24. * pci_generic_ecam_conf_address() - Calculate the address of a config access
  25. * @bus: Pointer to the PCI bus
  26. * @bdf: Identifies the PCIe device to access
  27. * @offset: The offset into the device's configuration space
  28. * @paddress: Pointer to the pointer to write the calculates address to
  29. *
  30. * Calculates the address that should be accessed to perform a PCIe
  31. * configuration space access for a given device identified by the PCIe
  32. * controller device @pcie and the bus, device & function numbers in @bdf. If
  33. * access to the device is not valid then the function will return an error
  34. * code. Otherwise the address to access will be written to the pointer pointed
  35. * to by @paddress.
  36. */
  37. static int pci_generic_ecam_conf_address(const struct udevice *bus,
  38. pci_dev_t bdf, uint offset,
  39. void **paddress)
  40. {
  41. struct generic_ecam_pcie *pcie = dev_get_priv(bus);
  42. void *addr;
  43. addr = pcie->cfg_base;
  44. addr += (PCI_BUS(bdf) - pcie->first_busno) << 20;
  45. addr += PCI_DEV(bdf) << 15;
  46. addr += PCI_FUNC(bdf) << 12;
  47. addr += offset;
  48. *paddress = addr;
  49. return 0;
  50. }
  51. static bool pci_generic_ecam_addr_valid(const struct udevice *bus,
  52. pci_dev_t bdf)
  53. {
  54. struct generic_ecam_pcie *pcie = dev_get_priv(bus);
  55. int num_buses = DIV_ROUND_UP(pcie->size, 1 << 16);
  56. return (PCI_BUS(bdf) >= pcie->first_busno &&
  57. PCI_BUS(bdf) < pcie->first_busno + num_buses);
  58. }
  59. /**
  60. * pci_generic_ecam_read_config() - Read from configuration space
  61. * @bus: Pointer to the PCI bus
  62. * @bdf: Identifies the PCIe device to access
  63. * @offset: The offset into the device's configuration space
  64. * @valuep: A pointer at which to store the read value
  65. * @size: Indicates the size of access to perform
  66. *
  67. * Read a value of size @size from offset @offset within the configuration
  68. * space of the device identified by the bus, device & function numbers in @bdf
  69. * on the PCI bus @bus.
  70. */
  71. static int pci_generic_ecam_read_config(const struct udevice *bus,
  72. pci_dev_t bdf, uint offset,
  73. ulong *valuep, enum pci_size_t size)
  74. {
  75. if (!pci_generic_ecam_addr_valid(bus, bdf)) {
  76. *valuep = pci_get_ff(size);
  77. return 0;
  78. }
  79. return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address,
  80. bdf, offset, valuep, size);
  81. }
  82. /**
  83. * pci_generic_ecam_write_config() - Write to configuration space
  84. * @bus: Pointer to the PCI bus
  85. * @bdf: Identifies the PCIe device to access
  86. * @offset: The offset into the device's configuration space
  87. * @value: The value to write
  88. * @size: Indicates the size of access to perform
  89. *
  90. * Write the value @value of size @size from offset @offset within the
  91. * configuration space of the device identified by the bus, device & function
  92. * numbers in @bdf on the PCI bus @bus.
  93. */
  94. static int pci_generic_ecam_write_config(struct udevice *bus, pci_dev_t bdf,
  95. uint offset, ulong value,
  96. enum pci_size_t size)
  97. {
  98. if (!pci_generic_ecam_addr_valid(bus, bdf))
  99. return 0;
  100. return pci_generic_mmap_write_config(bus, pci_generic_ecam_conf_address,
  101. bdf, offset, value, size);
  102. }
  103. /**
  104. * pci_generic_ecam_of_to_plat() - Translate from DT to device state
  105. * @dev: A pointer to the device being operated on
  106. *
  107. * Translate relevant data from the device tree pertaining to device @dev into
  108. * state that the driver will later make use of. This state is stored in the
  109. * device's private data structure.
  110. *
  111. * Return: 0 on success, else -EINVAL
  112. */
  113. static int pci_generic_ecam_of_to_plat(struct udevice *dev)
  114. {
  115. struct generic_ecam_pcie *pcie = dev_get_priv(dev);
  116. struct fdt_resource reg_res;
  117. DECLARE_GLOBAL_DATA_PTR;
  118. int err;
  119. err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
  120. 0, &reg_res);
  121. if (err < 0) {
  122. pr_err("\"reg\" resource not found\n");
  123. return err;
  124. }
  125. pcie->size = fdt_resource_size(&reg_res);
  126. pcie->cfg_base = map_physmem(reg_res.start, pcie->size, MAP_NOCACHE);
  127. return 0;
  128. }
  129. static int pci_generic_ecam_probe(struct udevice *dev)
  130. {
  131. struct generic_ecam_pcie *pcie = dev_get_priv(dev);
  132. pcie->first_busno = dev_seq(dev);
  133. return 0;
  134. }
  135. static const struct dm_pci_ops pci_generic_ecam_ops = {
  136. .read_config = pci_generic_ecam_read_config,
  137. .write_config = pci_generic_ecam_write_config,
  138. };
  139. static const struct udevice_id pci_generic_ecam_ids[] = {
  140. { .compatible = "pci-host-ecam-generic" },
  141. { }
  142. };
  143. U_BOOT_DRIVER(pci_generic_ecam) = {
  144. .name = "pci_generic_ecam",
  145. .id = UCLASS_PCI,
  146. .of_match = pci_generic_ecam_ids,
  147. .ops = &pci_generic_ecam_ops,
  148. .probe = pci_generic_ecam_probe,
  149. .of_to_plat = pci_generic_ecam_of_to_plat,
  150. .priv_auto = sizeof(struct generic_ecam_pcie),
  151. };