pic32_flash.c 9.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015
  4. * Cristian Birsan <cristian.birsan@microchip.com>
  5. * Purna Chandra Mandal <purna.mandal@microchip.com>
  6. */
  7. #include <common.h>
  8. #include <cpu_func.h>
  9. #include <dm.h>
  10. #include <fdt_support.h>
  11. #include <flash.h>
  12. #include <init.h>
  13. #include <irq_func.h>
  14. #include <asm/global_data.h>
  15. #include <linux/bitops.h>
  16. #include <mach/pic32.h>
  17. #include <wait_bit.h>
  18. DECLARE_GLOBAL_DATA_PTR;
  19. /* NVM Controller registers */
  20. struct pic32_reg_nvm {
  21. struct pic32_reg_atomic ctrl;
  22. struct pic32_reg_atomic key;
  23. struct pic32_reg_atomic addr;
  24. struct pic32_reg_atomic data;
  25. };
  26. /* NVM operations */
  27. #define NVMOP_NOP 0
  28. #define NVMOP_WORD_WRITE 1
  29. #define NVMOP_PAGE_ERASE 4
  30. /* NVM control bits */
  31. #define NVM_WR BIT(15)
  32. #define NVM_WREN BIT(14)
  33. #define NVM_WRERR BIT(13)
  34. #define NVM_LVDERR BIT(12)
  35. /* NVM programming unlock register */
  36. #define LOCK_KEY 0x0
  37. #define UNLOCK_KEY1 0xaa996655
  38. #define UNLOCK_KEY2 0x556699aa
  39. /*
  40. * PIC32 flash banks consist of number of pages, each page
  41. * into number of rows and rows into number of words.
  42. * Here we will maintain page information instead of sector.
  43. */
  44. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  45. static struct pic32_reg_nvm *nvm_regs_p;
  46. static inline void flash_initiate_operation(u32 nvmop)
  47. {
  48. /* set operation */
  49. writel(nvmop, &nvm_regs_p->ctrl.raw);
  50. /* enable flash write */
  51. writel(NVM_WREN, &nvm_regs_p->ctrl.set);
  52. /* unlock sequence */
  53. writel(LOCK_KEY, &nvm_regs_p->key.raw);
  54. writel(UNLOCK_KEY1, &nvm_regs_p->key.raw);
  55. writel(UNLOCK_KEY2, &nvm_regs_p->key.raw);
  56. /* initiate operation */
  57. writel(NVM_WR, &nvm_regs_p->ctrl.set);
  58. }
  59. static int flash_wait_till_busy(const char *func, ulong timeout)
  60. {
  61. int ret = wait_for_bit_le32(&nvm_regs_p->ctrl.raw,
  62. NVM_WR, false, timeout, false);
  63. return ret ? ERR_TIMEOUT : ERR_OK;
  64. }
  65. static inline int flash_complete_operation(void)
  66. {
  67. u32 tmp;
  68. tmp = readl(&nvm_regs_p->ctrl.raw);
  69. if (tmp & NVM_WRERR) {
  70. printf("Error in Block Erase - Lock Bit may be set!\n");
  71. flash_initiate_operation(NVMOP_NOP);
  72. return ERR_PROTECTED;
  73. }
  74. if (tmp & NVM_LVDERR) {
  75. printf("Error in Block Erase - low-vol detected!\n");
  76. flash_initiate_operation(NVMOP_NOP);
  77. return ERR_NOT_ERASED;
  78. }
  79. /* disable flash write or erase operation */
  80. writel(NVM_WREN, &nvm_regs_p->ctrl.clr);
  81. return ERR_OK;
  82. }
  83. /*
  84. * Erase flash sectors, returns:
  85. * ERR_OK - OK
  86. * ERR_INVAL - invalid sector arguments
  87. * ERR_TIMEOUT - write timeout
  88. * ERR_NOT_ERASED - Flash not erased
  89. * ERR_UNKNOWN_FLASH_VENDOR - incorrect flash
  90. */
  91. int flash_erase(flash_info_t *info, int s_first, int s_last)
  92. {
  93. ulong sect_start, sect_end, flags;
  94. int prot, sect;
  95. int rc;
  96. if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_MCHP) {
  97. printf("Can't erase unknown flash type %08lx - aborted\n",
  98. info->flash_id);
  99. return ERR_UNKNOWN_FLASH_VENDOR;
  100. }
  101. if ((s_first < 0) || (s_first > s_last)) {
  102. printf("- no sectors to erase\n");
  103. return ERR_INVAL;
  104. }
  105. prot = 0;
  106. for (sect = s_first; sect <= s_last; ++sect) {
  107. if (info->protect[sect])
  108. prot++;
  109. }
  110. if (prot)
  111. printf("- Warning: %d protected sectors will not be erased!\n",
  112. prot);
  113. else
  114. printf("\n");
  115. /* erase on unprotected sectors */
  116. for (sect = s_first; sect <= s_last; sect++) {
  117. if (info->protect[sect])
  118. continue;
  119. /* disable interrupts */
  120. flags = disable_interrupts();
  121. /* write destination page address (physical) */
  122. sect_start = CPHYSADDR(info->start[sect]);
  123. writel(sect_start, &nvm_regs_p->addr.raw);
  124. /* page erase */
  125. flash_initiate_operation(NVMOP_PAGE_ERASE);
  126. /* wait */
  127. rc = flash_wait_till_busy(__func__,
  128. CONFIG_SYS_FLASH_ERASE_TOUT);
  129. /* re-enable interrupts if necessary */
  130. if (flags)
  131. enable_interrupts();
  132. if (rc != ERR_OK)
  133. return rc;
  134. rc = flash_complete_operation();
  135. if (rc != ERR_OK)
  136. return rc;
  137. /*
  138. * flash content is updated but cache might contain stale
  139. * data, so invalidate dcache.
  140. */
  141. sect_end = info->start[sect] + info->size / info->sector_count;
  142. invalidate_dcache_range(info->start[sect], sect_end);
  143. }
  144. printf(" done\n");
  145. return ERR_OK;
  146. }
  147. int page_erase(flash_info_t *info, int sect)
  148. {
  149. return 0;
  150. }
  151. /* Write a word to flash */
  152. static int write_word(flash_info_t *info, ulong dest, ulong word)
  153. {
  154. ulong flags;
  155. int rc;
  156. /* read flash to check if it is sufficiently erased */
  157. if ((readl((void __iomem *)dest) & word) != word) {
  158. printf("Error, Flash not erased!\n");
  159. return ERR_NOT_ERASED;
  160. }
  161. /* disable interrupts */
  162. flags = disable_interrupts();
  163. /* update destination page address (physical) */
  164. writel(CPHYSADDR(dest), &nvm_regs_p->addr.raw);
  165. writel(word, &nvm_regs_p->data.raw);
  166. /* word write */
  167. flash_initiate_operation(NVMOP_WORD_WRITE);
  168. /* wait for operation to complete */
  169. rc = flash_wait_till_busy(__func__, CONFIG_SYS_FLASH_WRITE_TOUT);
  170. /* re-enable interrupts if necessary */
  171. if (flags)
  172. enable_interrupts();
  173. if (rc != ERR_OK)
  174. return rc;
  175. return flash_complete_operation();
  176. }
  177. /*
  178. * Copy memory to flash, returns:
  179. * ERR_OK - OK
  180. * ERR_TIMEOUT - write timeout
  181. * ERR_NOT_ERASED - Flash not erased
  182. */
  183. int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  184. {
  185. ulong dst, tmp_le, len = cnt;
  186. int i, l, rc;
  187. uchar *cp;
  188. /* get lower word aligned address */
  189. dst = (addr & ~3);
  190. /* handle unaligned start bytes */
  191. l = addr - dst;
  192. if (l != 0) {
  193. tmp_le = 0;
  194. for (i = 0, cp = (uchar *)dst; i < l; ++i, ++cp)
  195. tmp_le |= *cp << (i * 8);
  196. for (; (i < 4) && (cnt > 0); ++i, ++src, --cnt, ++cp)
  197. tmp_le |= *src << (i * 8);
  198. for (; (cnt == 0) && (i < 4); ++i, ++cp)
  199. tmp_le |= *cp << (i * 8);
  200. rc = write_word(info, dst, tmp_le);
  201. if (rc)
  202. goto out;
  203. dst += 4;
  204. }
  205. /* handle word aligned part */
  206. while (cnt >= 4) {
  207. tmp_le = src[0] | src[1] << 8 | src[2] << 16 | src[3] << 24;
  208. rc = write_word(info, dst, tmp_le);
  209. if (rc)
  210. goto out;
  211. src += 4;
  212. dst += 4;
  213. cnt -= 4;
  214. }
  215. if (cnt == 0) {
  216. rc = ERR_OK;
  217. goto out;
  218. }
  219. /* handle unaligned tail bytes */
  220. tmp_le = 0;
  221. for (i = 0, cp = (uchar *)dst; (i < 4) && (cnt > 0); ++i, ++cp) {
  222. tmp_le |= *src++ << (i * 8);
  223. --cnt;
  224. }
  225. for (; i < 4; ++i, ++cp)
  226. tmp_le |= *cp << (i * 8);
  227. rc = write_word(info, dst, tmp_le);
  228. out:
  229. /*
  230. * flash content updated by nvm controller but CPU cache might
  231. * have stale data, so invalidate dcache.
  232. */
  233. invalidate_dcache_range(addr, addr + len);
  234. printf(" done\n");
  235. return rc;
  236. }
  237. void flash_print_info(flash_info_t *info)
  238. {
  239. int i;
  240. if (info->flash_id == FLASH_UNKNOWN) {
  241. printf("missing or unknown FLASH type\n");
  242. return;
  243. }
  244. switch (info->flash_id & FLASH_VENDMASK) {
  245. case FLASH_MAN_MCHP:
  246. printf("Microchip Technology ");
  247. break;
  248. default:
  249. printf("Unknown Vendor ");
  250. break;
  251. }
  252. switch (info->flash_id & FLASH_TYPEMASK) {
  253. case FLASH_MCHP100T:
  254. printf("Internal (8 Mbit, 64 x 16k)\n");
  255. break;
  256. default:
  257. printf("Unknown Chip Type\n");
  258. break;
  259. }
  260. printf(" Size: %ld MB in %d Sectors\n",
  261. info->size >> 20, info->sector_count);
  262. printf(" Sector Start Addresses:");
  263. for (i = 0; i < info->sector_count; ++i) {
  264. if ((i % 5) == 0)
  265. printf("\n ");
  266. printf(" %08lX%s", info->start[i],
  267. info->protect[i] ? " (RO)" : " ");
  268. }
  269. printf("\n");
  270. }
  271. unsigned long flash_init(void)
  272. {
  273. unsigned long size = 0;
  274. struct udevice *dev;
  275. int bank;
  276. /* probe every MTD device */
  277. for (uclass_first_device(UCLASS_MTD, &dev); dev;
  278. uclass_next_device(&dev)) {
  279. /* nop */
  280. }
  281. /* calc total flash size */
  282. for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank)
  283. size += flash_info[bank].size;
  284. return size;
  285. }
  286. static void pic32_flash_bank_init(flash_info_t *info,
  287. ulong base, ulong size)
  288. {
  289. ulong sect_size;
  290. int sect;
  291. /* device & manufacturer code */
  292. info->flash_id = FLASH_MAN_MCHP | FLASH_MCHP100T;
  293. info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
  294. info->size = size;
  295. /* update sector (i.e page) info */
  296. sect_size = info->size / info->sector_count;
  297. for (sect = 0; sect < info->sector_count; sect++) {
  298. info->start[sect] = base;
  299. /* protect each sector by default */
  300. info->protect[sect] = 1;
  301. base += sect_size;
  302. }
  303. }
  304. static int pic32_flash_probe(struct udevice *dev)
  305. {
  306. void *blob = (void *)gd->fdt_blob;
  307. int node = dev_of_offset(dev);
  308. const char *list, *end;
  309. const fdt32_t *cell;
  310. unsigned long addr, size;
  311. int parent, addrc, sizec;
  312. flash_info_t *info;
  313. int len, idx;
  314. /*
  315. * decode regs. there are multiple reg tuples, and they need to
  316. * match with reg-names.
  317. */
  318. parent = fdt_parent_offset(blob, node);
  319. fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
  320. list = fdt_getprop(blob, node, "reg-names", &len);
  321. if (!list)
  322. return -ENOENT;
  323. end = list + len;
  324. cell = fdt_getprop(blob, node, "reg", &len);
  325. if (!cell)
  326. return -ENOENT;
  327. for (idx = 0, info = &flash_info[0]; list < end;) {
  328. addr = fdt_translate_address((void *)blob, node, cell + idx);
  329. size = fdt_addr_to_cpu(cell[idx + addrc]);
  330. len = strlen(list);
  331. if (!strncmp(list, "nvm", len)) {
  332. /* NVM controller */
  333. nvm_regs_p = ioremap(addr, size);
  334. } else if (!strncmp(list, "bank", 4)) {
  335. /* Flash bank: use kseg0 cached address */
  336. pic32_flash_bank_init(info, CKSEG0ADDR(addr), size);
  337. info++;
  338. }
  339. idx += addrc + sizec;
  340. list += len + 1;
  341. }
  342. /* disable flash write/erase operations */
  343. writel(NVM_WREN, &nvm_regs_p->ctrl.clr);
  344. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  345. /* monitor protection ON by default */
  346. flash_protect(FLAG_PROTECT_SET,
  347. CONFIG_SYS_MONITOR_BASE,
  348. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  349. &flash_info[0]);
  350. #endif
  351. #ifdef CONFIG_ENV_IS_IN_FLASH
  352. /* ENV protection ON by default */
  353. flash_protect(FLAG_PROTECT_SET,
  354. CONFIG_ENV_ADDR,
  355. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  356. &flash_info[0]);
  357. #endif
  358. return 0;
  359. }
  360. static const struct udevice_id pic32_flash_ids[] = {
  361. { .compatible = "microchip,pic32mzda-flash" },
  362. {}
  363. };
  364. U_BOOT_DRIVER(pic32_flash) = {
  365. .name = "pic32_flash",
  366. .id = UCLASS_MTD,
  367. .of_match = pic32_flash_ids,
  368. .probe = pic32_flash_probe,
  369. };