onenand_base.c 72 KB

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  1. /*
  2. * linux/drivers/mtd/onenand/onenand_base.c
  3. *
  4. * Copyright (C) 2005-2007 Samsung Electronics
  5. * Kyungmin Park <kyungmin.park@samsung.com>
  6. *
  7. * Credits:
  8. * Adrian Hunter <ext-adrian.hunter@nokia.com>:
  9. * auto-placement support, read-while load support, various fixes
  10. * Copyright (C) Nokia Corporation, 2007
  11. *
  12. * Rohit Hagargundgi <h.rohit at samsung.com>,
  13. * Amul Kumar Saha <amul.saha@samsung.com>:
  14. * Flex-OneNAND support
  15. * Copyright (C) Samsung Electronics, 2009
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License version 2 as
  19. * published by the Free Software Foundation.
  20. */
  21. #include <common.h>
  22. #include <log.h>
  23. #include <watchdog.h>
  24. #include <dm/devres.h>
  25. #include <linux/bitops.h>
  26. #include <linux/compat.h>
  27. #include <linux/mtd/mtd.h>
  28. #include "linux/mtd/flashchip.h"
  29. #include <linux/mtd/onenand.h>
  30. #include <asm/io.h>
  31. #include <linux/errno.h>
  32. #include <malloc.h>
  33. /* It should access 16-bit instead of 8-bit */
  34. static void *memcpy_16(void *dst, const void *src, unsigned int len)
  35. {
  36. void *ret = dst;
  37. short *d = dst;
  38. const short *s = src;
  39. len >>= 1;
  40. while (len-- > 0)
  41. *d++ = *s++;
  42. return ret;
  43. }
  44. /**
  45. * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
  46. * For now, we expose only 64 out of 80 ecc bytes
  47. */
  48. static struct nand_ecclayout onenand_oob_128 = {
  49. .eccbytes = 64,
  50. .eccpos = {
  51. 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
  52. 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
  53. 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
  54. 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
  55. 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
  56. 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
  57. 102, 103, 104, 105
  58. },
  59. .oobfree = {
  60. {2, 4}, {18, 4}, {34, 4}, {50, 4},
  61. {66, 4}, {82, 4}, {98, 4}, {114, 4}
  62. }
  63. };
  64. /**
  65. * onenand_oob_64 - oob info for large (2KB) page
  66. */
  67. static struct nand_ecclayout onenand_oob_64 = {
  68. .eccbytes = 20,
  69. .eccpos = {
  70. 8, 9, 10, 11, 12,
  71. 24, 25, 26, 27, 28,
  72. 40, 41, 42, 43, 44,
  73. 56, 57, 58, 59, 60,
  74. },
  75. .oobfree = {
  76. {2, 3}, {14, 2}, {18, 3}, {30, 2},
  77. {34, 3}, {46, 2}, {50, 3}, {62, 2}
  78. }
  79. };
  80. /**
  81. * onenand_oob_32 - oob info for middle (1KB) page
  82. */
  83. static struct nand_ecclayout onenand_oob_32 = {
  84. .eccbytes = 10,
  85. .eccpos = {
  86. 8, 9, 10, 11, 12,
  87. 24, 25, 26, 27, 28,
  88. },
  89. .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  90. };
  91. /*
  92. * Warning! This array is used with the memcpy_16() function, thus
  93. * it must be aligned to 2 bytes. GCC can make this array unaligned
  94. * as the array is made of unsigned char, which memcpy16() doesn't
  95. * like and will cause unaligned access.
  96. */
  97. static const unsigned char __aligned(2) ffchars[] = {
  98. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  99. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  100. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  101. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  102. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  103. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  104. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  105. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  106. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  107. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
  108. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  109. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
  110. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  111. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
  112. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  113. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
  114. };
  115. /**
  116. * onenand_readw - [OneNAND Interface] Read OneNAND register
  117. * @param addr address to read
  118. *
  119. * Read OneNAND register
  120. */
  121. static unsigned short onenand_readw(void __iomem * addr)
  122. {
  123. return readw(addr);
  124. }
  125. /**
  126. * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  127. * @param value value to write
  128. * @param addr address to write
  129. *
  130. * Write OneNAND register with value
  131. */
  132. static void onenand_writew(unsigned short value, void __iomem * addr)
  133. {
  134. writew(value, addr);
  135. }
  136. /**
  137. * onenand_block_address - [DEFAULT] Get block address
  138. * @param device the device id
  139. * @param block the block
  140. * @return translated block address if DDP, otherwise same
  141. *
  142. * Setup Start Address 1 Register (F100h)
  143. */
  144. static int onenand_block_address(struct onenand_chip *this, int block)
  145. {
  146. /* Device Flash Core select, NAND Flash Block Address */
  147. if (block & this->density_mask)
  148. return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
  149. return block;
  150. }
  151. /**
  152. * onenand_bufferram_address - [DEFAULT] Get bufferram address
  153. * @param device the device id
  154. * @param block the block
  155. * @return set DBS value if DDP, otherwise 0
  156. *
  157. * Setup Start Address 2 Register (F101h) for DDP
  158. */
  159. static int onenand_bufferram_address(struct onenand_chip *this, int block)
  160. {
  161. /* Device BufferRAM Select */
  162. if (block & this->density_mask)
  163. return ONENAND_DDP_CHIP1;
  164. return ONENAND_DDP_CHIP0;
  165. }
  166. /**
  167. * onenand_page_address - [DEFAULT] Get page address
  168. * @param page the page address
  169. * @param sector the sector address
  170. * @return combined page and sector address
  171. *
  172. * Setup Start Address 8 Register (F107h)
  173. */
  174. static int onenand_page_address(int page, int sector)
  175. {
  176. /* Flash Page Address, Flash Sector Address */
  177. int fpa, fsa;
  178. fpa = page & ONENAND_FPA_MASK;
  179. fsa = sector & ONENAND_FSA_MASK;
  180. return ((fpa << ONENAND_FPA_SHIFT) | fsa);
  181. }
  182. /**
  183. * onenand_buffer_address - [DEFAULT] Get buffer address
  184. * @param dataram1 DataRAM index
  185. * @param sectors the sector address
  186. * @param count the number of sectors
  187. * @return the start buffer value
  188. *
  189. * Setup Start Buffer Register (F200h)
  190. */
  191. static int onenand_buffer_address(int dataram1, int sectors, int count)
  192. {
  193. int bsa, bsc;
  194. /* BufferRAM Sector Address */
  195. bsa = sectors & ONENAND_BSA_MASK;
  196. if (dataram1)
  197. bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
  198. else
  199. bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
  200. /* BufferRAM Sector Count */
  201. bsc = count & ONENAND_BSC_MASK;
  202. return ((bsa << ONENAND_BSA_SHIFT) | bsc);
  203. }
  204. /**
  205. * flexonenand_block - Return block number for flash address
  206. * @param this - OneNAND device structure
  207. * @param addr - Address for which block number is needed
  208. */
  209. static unsigned int flexonenand_block(struct onenand_chip *this, loff_t addr)
  210. {
  211. unsigned int boundary, blk, die = 0;
  212. if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
  213. die = 1;
  214. addr -= this->diesize[0];
  215. }
  216. boundary = this->boundary[die];
  217. blk = addr >> (this->erase_shift - 1);
  218. if (blk > boundary)
  219. blk = (blk + boundary + 1) >> 1;
  220. blk += die ? this->density_mask : 0;
  221. return blk;
  222. }
  223. unsigned int onenand_block(struct onenand_chip *this, loff_t addr)
  224. {
  225. if (!FLEXONENAND(this))
  226. return addr >> this->erase_shift;
  227. return flexonenand_block(this, addr);
  228. }
  229. /**
  230. * flexonenand_addr - Return address of the block
  231. * @this: OneNAND device structure
  232. * @block: Block number on Flex-OneNAND
  233. *
  234. * Return address of the block
  235. */
  236. static loff_t flexonenand_addr(struct onenand_chip *this, int block)
  237. {
  238. loff_t ofs = 0;
  239. int die = 0, boundary;
  240. if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
  241. block -= this->density_mask;
  242. die = 1;
  243. ofs = this->diesize[0];
  244. }
  245. boundary = this->boundary[die];
  246. ofs += (loff_t) block << (this->erase_shift - 1);
  247. if (block > (boundary + 1))
  248. ofs += (loff_t) (block - boundary - 1)
  249. << (this->erase_shift - 1);
  250. return ofs;
  251. }
  252. loff_t onenand_addr(struct onenand_chip *this, int block)
  253. {
  254. if (!FLEXONENAND(this))
  255. return (loff_t) block << this->erase_shift;
  256. return flexonenand_addr(this, block);
  257. }
  258. /**
  259. * flexonenand_region - [Flex-OneNAND] Return erase region of addr
  260. * @param mtd MTD device structure
  261. * @param addr address whose erase region needs to be identified
  262. */
  263. int flexonenand_region(struct mtd_info *mtd, loff_t addr)
  264. {
  265. int i;
  266. for (i = 0; i < mtd->numeraseregions; i++)
  267. if (addr < mtd->eraseregions[i].offset)
  268. break;
  269. return i - 1;
  270. }
  271. /**
  272. * onenand_get_density - [DEFAULT] Get OneNAND density
  273. * @param dev_id OneNAND device ID
  274. *
  275. * Get OneNAND density from device ID
  276. */
  277. static inline int onenand_get_density(int dev_id)
  278. {
  279. int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  280. return (density & ONENAND_DEVICE_DENSITY_MASK);
  281. }
  282. /**
  283. * onenand_command - [DEFAULT] Send command to OneNAND device
  284. * @param mtd MTD device structure
  285. * @param cmd the command to be sent
  286. * @param addr offset to read from or write to
  287. * @param len number of bytes to read or write
  288. *
  289. * Send command to OneNAND device. This function is used for middle/large page
  290. * devices (1KB/2KB Bytes per page)
  291. */
  292. static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
  293. size_t len)
  294. {
  295. struct onenand_chip *this = mtd->priv;
  296. int value;
  297. int block, page;
  298. /* Now we use page size operation */
  299. int sectors = 0, count = 0;
  300. /* Address translation */
  301. switch (cmd) {
  302. case ONENAND_CMD_UNLOCK:
  303. case ONENAND_CMD_LOCK:
  304. case ONENAND_CMD_LOCK_TIGHT:
  305. case ONENAND_CMD_UNLOCK_ALL:
  306. block = -1;
  307. page = -1;
  308. break;
  309. case FLEXONENAND_CMD_PI_ACCESS:
  310. /* addr contains die index */
  311. block = addr * this->density_mask;
  312. page = -1;
  313. break;
  314. case ONENAND_CMD_ERASE:
  315. case ONENAND_CMD_BUFFERRAM:
  316. block = onenand_block(this, addr);
  317. page = -1;
  318. break;
  319. case FLEXONENAND_CMD_READ_PI:
  320. cmd = ONENAND_CMD_READ;
  321. block = addr * this->density_mask;
  322. page = 0;
  323. break;
  324. default:
  325. block = onenand_block(this, addr);
  326. page = (int) (addr
  327. - onenand_addr(this, block)) >> this->page_shift;
  328. page &= this->page_mask;
  329. break;
  330. }
  331. /* NOTE: The setting order of the registers is very important! */
  332. if (cmd == ONENAND_CMD_BUFFERRAM) {
  333. /* Select DataRAM for DDP */
  334. value = onenand_bufferram_address(this, block);
  335. this->write_word(value,
  336. this->base + ONENAND_REG_START_ADDRESS2);
  337. if (ONENAND_IS_4KB_PAGE(this))
  338. ONENAND_SET_BUFFERRAM0(this);
  339. else
  340. /* Switch to the next data buffer */
  341. ONENAND_SET_NEXT_BUFFERRAM(this);
  342. return 0;
  343. }
  344. if (block != -1) {
  345. /* Write 'DFS, FBA' of Flash */
  346. value = onenand_block_address(this, block);
  347. this->write_word(value,
  348. this->base + ONENAND_REG_START_ADDRESS1);
  349. /* Select DataRAM for DDP */
  350. value = onenand_bufferram_address(this, block);
  351. this->write_word(value,
  352. this->base + ONENAND_REG_START_ADDRESS2);
  353. }
  354. if (page != -1) {
  355. int dataram;
  356. switch (cmd) {
  357. case FLEXONENAND_CMD_RECOVER_LSB:
  358. case ONENAND_CMD_READ:
  359. case ONENAND_CMD_READOOB:
  360. if (ONENAND_IS_4KB_PAGE(this))
  361. dataram = ONENAND_SET_BUFFERRAM0(this);
  362. else
  363. dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
  364. break;
  365. default:
  366. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  367. break;
  368. }
  369. /* Write 'FPA, FSA' of Flash */
  370. value = onenand_page_address(page, sectors);
  371. this->write_word(value,
  372. this->base + ONENAND_REG_START_ADDRESS8);
  373. /* Write 'BSA, BSC' of DataRAM */
  374. value = onenand_buffer_address(dataram, sectors, count);
  375. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  376. }
  377. /* Interrupt clear */
  378. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  379. /* Write command */
  380. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  381. return 0;
  382. }
  383. /**
  384. * onenand_read_ecc - return ecc status
  385. * @param this onenand chip structure
  386. */
  387. static int onenand_read_ecc(struct onenand_chip *this)
  388. {
  389. int ecc, i;
  390. if (!FLEXONENAND(this))
  391. return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  392. for (i = 0; i < 4; i++) {
  393. ecc = this->read_word(this->base
  394. + ((ONENAND_REG_ECC_STATUS + i) << 1));
  395. if (likely(!ecc))
  396. continue;
  397. if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
  398. return ONENAND_ECC_2BIT_ALL;
  399. }
  400. return 0;
  401. }
  402. /**
  403. * onenand_wait - [DEFAULT] wait until the command is done
  404. * @param mtd MTD device structure
  405. * @param state state to select the max. timeout value
  406. *
  407. * Wait for command done. This applies to all OneNAND command
  408. * Read can take up to 30us, erase up to 2ms and program up to 350us
  409. * according to general OneNAND specs
  410. */
  411. static int onenand_wait(struct mtd_info *mtd, int state)
  412. {
  413. struct onenand_chip *this = mtd->priv;
  414. unsigned int interrupt = 0;
  415. unsigned int ctrl;
  416. /* Wait at most 20ms ... */
  417. u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
  418. u32 time_start = get_timer(0);
  419. do {
  420. WATCHDOG_RESET();
  421. if (get_timer(time_start) > timeo)
  422. return -EIO;
  423. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  424. } while ((interrupt & ONENAND_INT_MASTER) == 0);
  425. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  426. if (interrupt & ONENAND_INT_READ) {
  427. int ecc = onenand_read_ecc(this);
  428. if (ecc & ONENAND_ECC_2BIT_ALL) {
  429. printk("onenand_wait: ECC error = 0x%04x\n", ecc);
  430. return -EBADMSG;
  431. }
  432. }
  433. if (ctrl & ONENAND_CTRL_ERROR) {
  434. printk("onenand_wait: controller error = 0x%04x\n", ctrl);
  435. if (ctrl & ONENAND_CTRL_LOCK)
  436. printk("onenand_wait: it's locked error = 0x%04x\n",
  437. ctrl);
  438. return -EIO;
  439. }
  440. return 0;
  441. }
  442. /**
  443. * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
  444. * @param mtd MTD data structure
  445. * @param area BufferRAM area
  446. * @return offset given area
  447. *
  448. * Return BufferRAM offset given area
  449. */
  450. static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
  451. {
  452. struct onenand_chip *this = mtd->priv;
  453. if (ONENAND_CURRENT_BUFFERRAM(this)) {
  454. if (area == ONENAND_DATARAM)
  455. return mtd->writesize;
  456. if (area == ONENAND_SPARERAM)
  457. return mtd->oobsize;
  458. }
  459. return 0;
  460. }
  461. /**
  462. * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
  463. * @param mtd MTD data structure
  464. * @param area BufferRAM area
  465. * @param buffer the databuffer to put/get data
  466. * @param offset offset to read from or write to
  467. * @param count number of bytes to read/write
  468. *
  469. * Read the BufferRAM area
  470. */
  471. static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
  472. unsigned char *buffer, int offset,
  473. size_t count)
  474. {
  475. struct onenand_chip *this = mtd->priv;
  476. void __iomem *bufferram;
  477. bufferram = this->base + area;
  478. bufferram += onenand_bufferram_offset(mtd, area);
  479. memcpy_16(buffer, bufferram + offset, count);
  480. return 0;
  481. }
  482. /**
  483. * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
  484. * @param mtd MTD data structure
  485. * @param area BufferRAM area
  486. * @param buffer the databuffer to put/get data
  487. * @param offset offset to read from or write to
  488. * @param count number of bytes to read/write
  489. *
  490. * Read the BufferRAM area with Sync. Burst Mode
  491. */
  492. static int onenand_sync_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
  493. unsigned char *buffer, int offset,
  494. size_t count)
  495. {
  496. struct onenand_chip *this = mtd->priv;
  497. void __iomem *bufferram;
  498. bufferram = this->base + area;
  499. bufferram += onenand_bufferram_offset(mtd, area);
  500. this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
  501. memcpy_16(buffer, bufferram + offset, count);
  502. this->mmcontrol(mtd, 0);
  503. return 0;
  504. }
  505. /**
  506. * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
  507. * @param mtd MTD data structure
  508. * @param area BufferRAM area
  509. * @param buffer the databuffer to put/get data
  510. * @param offset offset to read from or write to
  511. * @param count number of bytes to read/write
  512. *
  513. * Write the BufferRAM area
  514. */
  515. static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,
  516. const unsigned char *buffer, int offset,
  517. size_t count)
  518. {
  519. struct onenand_chip *this = mtd->priv;
  520. void __iomem *bufferram;
  521. bufferram = this->base + area;
  522. bufferram += onenand_bufferram_offset(mtd, area);
  523. memcpy_16(bufferram + offset, buffer, count);
  524. return 0;
  525. }
  526. /**
  527. * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
  528. * @param mtd MTD data structure
  529. * @param addr address to check
  530. * @return blockpage address
  531. *
  532. * Get blockpage address at 2x program mode
  533. */
  534. static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
  535. {
  536. struct onenand_chip *this = mtd->priv;
  537. int blockpage, block, page;
  538. /* Calculate the even block number */
  539. block = (int) (addr >> this->erase_shift) & ~1;
  540. /* Is it the odd plane? */
  541. if (addr & this->writesize)
  542. block++;
  543. page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
  544. blockpage = (block << 7) | page;
  545. return blockpage;
  546. }
  547. /**
  548. * onenand_check_bufferram - [GENERIC] Check BufferRAM information
  549. * @param mtd MTD data structure
  550. * @param addr address to check
  551. * @return 1 if there are valid data, otherwise 0
  552. *
  553. * Check bufferram if there is data we required
  554. */
  555. static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
  556. {
  557. struct onenand_chip *this = mtd->priv;
  558. int blockpage, found = 0;
  559. unsigned int i;
  560. if (ONENAND_IS_2PLANE(this))
  561. blockpage = onenand_get_2x_blockpage(mtd, addr);
  562. else
  563. blockpage = (int) (addr >> this->page_shift);
  564. /* Is there valid data? */
  565. i = ONENAND_CURRENT_BUFFERRAM(this);
  566. if (this->bufferram[i].blockpage == blockpage)
  567. found = 1;
  568. else {
  569. /* Check another BufferRAM */
  570. i = ONENAND_NEXT_BUFFERRAM(this);
  571. if (this->bufferram[i].blockpage == blockpage) {
  572. ONENAND_SET_NEXT_BUFFERRAM(this);
  573. found = 1;
  574. }
  575. }
  576. if (found && ONENAND_IS_DDP(this)) {
  577. /* Select DataRAM for DDP */
  578. int block = onenand_block(this, addr);
  579. int value = onenand_bufferram_address(this, block);
  580. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  581. }
  582. return found;
  583. }
  584. /**
  585. * onenand_update_bufferram - [GENERIC] Update BufferRAM information
  586. * @param mtd MTD data structure
  587. * @param addr address to update
  588. * @param valid valid flag
  589. *
  590. * Update BufferRAM information
  591. */
  592. static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
  593. int valid)
  594. {
  595. struct onenand_chip *this = mtd->priv;
  596. int blockpage;
  597. unsigned int i;
  598. if (ONENAND_IS_2PLANE(this))
  599. blockpage = onenand_get_2x_blockpage(mtd, addr);
  600. else
  601. blockpage = (int)(addr >> this->page_shift);
  602. /* Invalidate another BufferRAM */
  603. i = ONENAND_NEXT_BUFFERRAM(this);
  604. if (this->bufferram[i].blockpage == blockpage)
  605. this->bufferram[i].blockpage = -1;
  606. /* Update BufferRAM */
  607. i = ONENAND_CURRENT_BUFFERRAM(this);
  608. if (valid)
  609. this->bufferram[i].blockpage = blockpage;
  610. else
  611. this->bufferram[i].blockpage = -1;
  612. return 0;
  613. }
  614. /**
  615. * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
  616. * @param mtd MTD data structure
  617. * @param addr start address to invalidate
  618. * @param len length to invalidate
  619. *
  620. * Invalidate BufferRAM information
  621. */
  622. static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
  623. unsigned int len)
  624. {
  625. struct onenand_chip *this = mtd->priv;
  626. int i;
  627. loff_t end_addr = addr + len;
  628. /* Invalidate BufferRAM */
  629. for (i = 0; i < MAX_BUFFERRAM; i++) {
  630. loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
  631. if (buf_addr >= addr && buf_addr < end_addr)
  632. this->bufferram[i].blockpage = -1;
  633. }
  634. }
  635. /**
  636. * onenand_get_device - [GENERIC] Get chip for selected access
  637. * @param mtd MTD device structure
  638. * @param new_state the state which is requested
  639. *
  640. * Get the device and lock it for exclusive access
  641. */
  642. static void onenand_get_device(struct mtd_info *mtd, int new_state)
  643. {
  644. /* Do nothing */
  645. }
  646. /**
  647. * onenand_release_device - [GENERIC] release chip
  648. * @param mtd MTD device structure
  649. *
  650. * Deselect, release chip lock and wake up anyone waiting on the device
  651. */
  652. static void onenand_release_device(struct mtd_info *mtd)
  653. {
  654. /* Do nothing */
  655. }
  656. /**
  657. * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
  658. * @param mtd MTD device structure
  659. * @param buf destination address
  660. * @param column oob offset to read from
  661. * @param thislen oob length to read
  662. */
  663. static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf,
  664. int column, int thislen)
  665. {
  666. struct onenand_chip *this = mtd->priv;
  667. struct nand_oobfree *free;
  668. int readcol = column;
  669. int readend = column + thislen;
  670. int lastgap = 0;
  671. unsigned int i;
  672. uint8_t *oob_buf = this->oob_buf;
  673. free = this->ecclayout->oobfree;
  674. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE && free->length;
  675. i++, free++) {
  676. if (readcol >= lastgap)
  677. readcol += free->offset - lastgap;
  678. if (readend >= lastgap)
  679. readend += free->offset - lastgap;
  680. lastgap = free->offset + free->length;
  681. }
  682. this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  683. free = this->ecclayout->oobfree;
  684. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE && free->length;
  685. i++, free++) {
  686. int free_end = free->offset + free->length;
  687. if (free->offset < readend && free_end > readcol) {
  688. int st = max_t(int,free->offset,readcol);
  689. int ed = min_t(int,free_end,readend);
  690. int n = ed - st;
  691. memcpy(buf, oob_buf + st, n);
  692. buf += n;
  693. } else if (column == 0)
  694. break;
  695. }
  696. return 0;
  697. }
  698. /**
  699. * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
  700. * @param mtd MTD device structure
  701. * @param addr address to recover
  702. * @param status return value from onenand_wait
  703. *
  704. * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
  705. * lower page address and MSB page has higher page address in paired pages.
  706. * If power off occurs during MSB page program, the paired LSB page data can
  707. * become corrupt. LSB page recovery read is a way to read LSB page though page
  708. * data are corrupted. When uncorrectable error occurs as a result of LSB page
  709. * read after power up, issue LSB page recovery read.
  710. */
  711. static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
  712. {
  713. struct onenand_chip *this = mtd->priv;
  714. int i;
  715. /* Recovery is only for Flex-OneNAND */
  716. if (!FLEXONENAND(this))
  717. return status;
  718. /* check if we failed due to uncorrectable error */
  719. if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR)
  720. return status;
  721. /* check if address lies in MLC region */
  722. i = flexonenand_region(mtd, addr);
  723. if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
  724. return status;
  725. printk("onenand_recover_lsb:"
  726. "Attempting to recover from uncorrectable read\n");
  727. /* Issue the LSB page recovery command */
  728. this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
  729. return this->wait(mtd, FL_READING);
  730. }
  731. /**
  732. * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
  733. * @param mtd MTD device structure
  734. * @param from offset to read from
  735. * @param ops oob operation description structure
  736. *
  737. * OneNAND read main and/or out-of-band data
  738. */
  739. static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  740. struct mtd_oob_ops *ops)
  741. {
  742. struct onenand_chip *this = mtd->priv;
  743. struct mtd_ecc_stats stats;
  744. size_t len = ops->len;
  745. size_t ooblen = ops->ooblen;
  746. u_char *buf = ops->datbuf;
  747. u_char *oobbuf = ops->oobbuf;
  748. int read = 0, column, thislen;
  749. int oobread = 0, oobcolumn, thisooblen, oobsize;
  750. int ret = 0, boundary = 0;
  751. int writesize = this->writesize;
  752. pr_debug("onenand_read_ops_nolock: from = 0x%08x, len = %i\n",
  753. (unsigned int) from, (int) len);
  754. if (ops->mode == MTD_OPS_AUTO_OOB)
  755. oobsize = this->ecclayout->oobavail;
  756. else
  757. oobsize = mtd->oobsize;
  758. oobcolumn = from & (mtd->oobsize - 1);
  759. /* Do not allow reads past end of device */
  760. if ((from + len) > mtd->size) {
  761. printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
  762. ops->retlen = 0;
  763. ops->oobretlen = 0;
  764. return -EINVAL;
  765. }
  766. stats = mtd->ecc_stats;
  767. /* Read-while-load method */
  768. /* Note: We can't use this feature in MLC */
  769. /* Do first load to bufferRAM */
  770. if (read < len) {
  771. if (!onenand_check_bufferram(mtd, from)) {
  772. this->main_buf = buf;
  773. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  774. ret = this->wait(mtd, FL_READING);
  775. if (unlikely(ret))
  776. ret = onenand_recover_lsb(mtd, from, ret);
  777. onenand_update_bufferram(mtd, from, !ret);
  778. if (ret == -EBADMSG)
  779. ret = 0;
  780. }
  781. }
  782. thislen = min_t(int, writesize, len - read);
  783. column = from & (writesize - 1);
  784. if (column + thislen > writesize)
  785. thislen = writesize - column;
  786. while (!ret) {
  787. /* If there is more to load then start next load */
  788. from += thislen;
  789. if (!ONENAND_IS_4KB_PAGE(this) && read + thislen < len) {
  790. this->main_buf = buf + thislen;
  791. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  792. /*
  793. * Chip boundary handling in DDP
  794. * Now we issued chip 1 read and pointed chip 1
  795. * bufferam so we have to point chip 0 bufferam.
  796. */
  797. if (ONENAND_IS_DDP(this) &&
  798. unlikely(from == (this->chipsize >> 1))) {
  799. this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
  800. boundary = 1;
  801. } else
  802. boundary = 0;
  803. ONENAND_SET_PREV_BUFFERRAM(this);
  804. }
  805. /* While load is going, read from last bufferRAM */
  806. this->read_bufferram(mtd, from - thislen, ONENAND_DATARAM, buf, column, thislen);
  807. /* Read oob area if needed */
  808. if (oobbuf) {
  809. thisooblen = oobsize - oobcolumn;
  810. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  811. if (ops->mode == MTD_OPS_AUTO_OOB)
  812. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  813. else
  814. this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  815. oobread += thisooblen;
  816. oobbuf += thisooblen;
  817. oobcolumn = 0;
  818. }
  819. if (ONENAND_IS_4KB_PAGE(this) && (read + thislen < len)) {
  820. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  821. ret = this->wait(mtd, FL_READING);
  822. if (unlikely(ret))
  823. ret = onenand_recover_lsb(mtd, from, ret);
  824. onenand_update_bufferram(mtd, from, !ret);
  825. if (mtd_is_eccerr(ret))
  826. ret = 0;
  827. }
  828. /* See if we are done */
  829. read += thislen;
  830. if (read == len)
  831. break;
  832. /* Set up for next read from bufferRAM */
  833. if (unlikely(boundary))
  834. this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
  835. if (!ONENAND_IS_4KB_PAGE(this))
  836. ONENAND_SET_NEXT_BUFFERRAM(this);
  837. buf += thislen;
  838. thislen = min_t(int, writesize, len - read);
  839. column = 0;
  840. if (!ONENAND_IS_4KB_PAGE(this)) {
  841. /* Now wait for load */
  842. ret = this->wait(mtd, FL_READING);
  843. onenand_update_bufferram(mtd, from, !ret);
  844. if (mtd_is_eccerr(ret))
  845. ret = 0;
  846. }
  847. }
  848. /*
  849. * Return success, if no ECC failures, else -EBADMSG
  850. * fs driver will take care of that, because
  851. * retlen == desired len and result == -EBADMSG
  852. */
  853. ops->retlen = read;
  854. ops->oobretlen = oobread;
  855. if (ret)
  856. return ret;
  857. if (mtd->ecc_stats.failed - stats.failed)
  858. return -EBADMSG;
  859. /* return max bitflips per ecc step; ONENANDs correct 1 bit only */
  860. return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
  861. }
  862. /**
  863. * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
  864. * @param mtd MTD device structure
  865. * @param from offset to read from
  866. * @param ops oob operation description structure
  867. *
  868. * OneNAND read out-of-band data from the spare area
  869. */
  870. static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
  871. struct mtd_oob_ops *ops)
  872. {
  873. struct onenand_chip *this = mtd->priv;
  874. struct mtd_ecc_stats stats;
  875. int read = 0, thislen, column, oobsize;
  876. size_t len = ops->ooblen;
  877. unsigned int mode = ops->mode;
  878. u_char *buf = ops->oobbuf;
  879. int ret = 0, readcmd;
  880. from += ops->ooboffs;
  881. pr_debug("onenand_read_oob_nolock: from = 0x%08x, len = %i\n",
  882. (unsigned int) from, (int) len);
  883. /* Initialize return length value */
  884. ops->oobretlen = 0;
  885. if (mode == MTD_OPS_AUTO_OOB)
  886. oobsize = this->ecclayout->oobavail;
  887. else
  888. oobsize = mtd->oobsize;
  889. column = from & (mtd->oobsize - 1);
  890. if (unlikely(column >= oobsize)) {
  891. printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
  892. return -EINVAL;
  893. }
  894. /* Do not allow reads past end of device */
  895. if (unlikely(from >= mtd->size ||
  896. column + len > ((mtd->size >> this->page_shift) -
  897. (from >> this->page_shift)) * oobsize)) {
  898. printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
  899. return -EINVAL;
  900. }
  901. stats = mtd->ecc_stats;
  902. readcmd = ONENAND_IS_4KB_PAGE(this) ?
  903. ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  904. while (read < len) {
  905. thislen = oobsize - column;
  906. thislen = min_t(int, thislen, len);
  907. this->spare_buf = buf;
  908. this->command(mtd, readcmd, from, mtd->oobsize);
  909. onenand_update_bufferram(mtd, from, 0);
  910. ret = this->wait(mtd, FL_READING);
  911. if (unlikely(ret))
  912. ret = onenand_recover_lsb(mtd, from, ret);
  913. if (ret && ret != -EBADMSG) {
  914. printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
  915. break;
  916. }
  917. if (mode == MTD_OPS_AUTO_OOB)
  918. onenand_transfer_auto_oob(mtd, buf, column, thislen);
  919. else
  920. this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen);
  921. read += thislen;
  922. if (read == len)
  923. break;
  924. buf += thislen;
  925. /* Read more? */
  926. if (read < len) {
  927. /* Page size */
  928. from += mtd->writesize;
  929. column = 0;
  930. }
  931. }
  932. ops->oobretlen = read;
  933. if (ret)
  934. return ret;
  935. if (mtd->ecc_stats.failed - stats.failed)
  936. return -EBADMSG;
  937. return 0;
  938. }
  939. /**
  940. * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
  941. * @param mtd MTD device structure
  942. * @param from offset to read from
  943. * @param len number of bytes to read
  944. * @param retlen pointer to variable to store the number of read bytes
  945. * @param buf the databuffer to put data
  946. *
  947. * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
  948. */
  949. int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
  950. size_t * retlen, u_char * buf)
  951. {
  952. struct mtd_oob_ops ops = {
  953. .len = len,
  954. .ooblen = 0,
  955. .datbuf = buf,
  956. .oobbuf = NULL,
  957. };
  958. int ret;
  959. onenand_get_device(mtd, FL_READING);
  960. ret = onenand_read_ops_nolock(mtd, from, &ops);
  961. onenand_release_device(mtd);
  962. *retlen = ops.retlen;
  963. return ret;
  964. }
  965. /**
  966. * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
  967. * @param mtd MTD device structure
  968. * @param from offset to read from
  969. * @param ops oob operations description structure
  970. *
  971. * OneNAND main and/or out-of-band
  972. */
  973. int onenand_read_oob(struct mtd_info *mtd, loff_t from,
  974. struct mtd_oob_ops *ops)
  975. {
  976. int ret;
  977. switch (ops->mode) {
  978. case MTD_OPS_PLACE_OOB:
  979. case MTD_OPS_AUTO_OOB:
  980. break;
  981. case MTD_OPS_RAW:
  982. /* Not implemented yet */
  983. default:
  984. return -EINVAL;
  985. }
  986. onenand_get_device(mtd, FL_READING);
  987. if (ops->datbuf)
  988. ret = onenand_read_ops_nolock(mtd, from, ops);
  989. else
  990. ret = onenand_read_oob_nolock(mtd, from, ops);
  991. onenand_release_device(mtd);
  992. return ret;
  993. }
  994. /**
  995. * onenand_bbt_wait - [DEFAULT] wait until the command is done
  996. * @param mtd MTD device structure
  997. * @param state state to select the max. timeout value
  998. *
  999. * Wait for command done.
  1000. */
  1001. static int onenand_bbt_wait(struct mtd_info *mtd, int state)
  1002. {
  1003. struct onenand_chip *this = mtd->priv;
  1004. unsigned int interrupt;
  1005. unsigned int ctrl;
  1006. /* Wait at most 20ms ... */
  1007. u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
  1008. u32 time_start = get_timer(0);
  1009. do {
  1010. WATCHDOG_RESET();
  1011. if (get_timer(time_start) > timeo)
  1012. return ONENAND_BBT_READ_FATAL_ERROR;
  1013. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1014. } while ((interrupt & ONENAND_INT_MASTER) == 0);
  1015. /* To get correct interrupt status in timeout case */
  1016. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1017. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  1018. if (interrupt & ONENAND_INT_READ) {
  1019. int ecc = onenand_read_ecc(this);
  1020. if (ecc & ONENAND_ECC_2BIT_ALL) {
  1021. printk(KERN_INFO "onenand_bbt_wait: ecc error = 0x%04x"
  1022. ", controller = 0x%04x\n", ecc, ctrl);
  1023. return ONENAND_BBT_READ_ERROR;
  1024. }
  1025. } else {
  1026. printk(KERN_ERR "onenand_bbt_wait: read timeout!"
  1027. "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
  1028. return ONENAND_BBT_READ_FATAL_ERROR;
  1029. }
  1030. /* Initial bad block case: 0x2400 or 0x0400 */
  1031. if (ctrl & ONENAND_CTRL_ERROR) {
  1032. printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
  1033. return ONENAND_BBT_READ_ERROR;
  1034. }
  1035. return 0;
  1036. }
  1037. /**
  1038. * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
  1039. * @param mtd MTD device structure
  1040. * @param from offset to read from
  1041. * @param ops oob operation description structure
  1042. *
  1043. * OneNAND read out-of-band data from the spare area for bbt scan
  1044. */
  1045. int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
  1046. struct mtd_oob_ops *ops)
  1047. {
  1048. struct onenand_chip *this = mtd->priv;
  1049. int read = 0, thislen, column;
  1050. int ret = 0, readcmd;
  1051. size_t len = ops->ooblen;
  1052. u_char *buf = ops->oobbuf;
  1053. pr_debug("onenand_bbt_read_oob: from = 0x%08x, len = %zi\n",
  1054. (unsigned int) from, len);
  1055. readcmd = ONENAND_IS_4KB_PAGE(this) ?
  1056. ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1057. /* Initialize return value */
  1058. ops->oobretlen = 0;
  1059. /* Do not allow reads past end of device */
  1060. if (unlikely((from + len) > mtd->size)) {
  1061. printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
  1062. return ONENAND_BBT_READ_FATAL_ERROR;
  1063. }
  1064. /* Grab the lock and see if the device is available */
  1065. onenand_get_device(mtd, FL_READING);
  1066. column = from & (mtd->oobsize - 1);
  1067. while (read < len) {
  1068. thislen = mtd->oobsize - column;
  1069. thislen = min_t(int, thislen, len);
  1070. this->spare_buf = buf;
  1071. this->command(mtd, readcmd, from, mtd->oobsize);
  1072. onenand_update_bufferram(mtd, from, 0);
  1073. ret = this->bbt_wait(mtd, FL_READING);
  1074. if (unlikely(ret))
  1075. ret = onenand_recover_lsb(mtd, from, ret);
  1076. if (ret)
  1077. break;
  1078. this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen);
  1079. read += thislen;
  1080. if (read == len)
  1081. break;
  1082. buf += thislen;
  1083. /* Read more? */
  1084. if (read < len) {
  1085. /* Update Page size */
  1086. from += this->writesize;
  1087. column = 0;
  1088. }
  1089. }
  1090. /* Deselect and wake up anyone waiting on the device */
  1091. onenand_release_device(mtd);
  1092. ops->oobretlen = read;
  1093. return ret;
  1094. }
  1095. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  1096. /**
  1097. * onenand_verify_oob - [GENERIC] verify the oob contents after a write
  1098. * @param mtd MTD device structure
  1099. * @param buf the databuffer to verify
  1100. * @param to offset to read from
  1101. */
  1102. static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
  1103. {
  1104. struct onenand_chip *this = mtd->priv;
  1105. u_char *oob_buf = this->oob_buf;
  1106. int status, i, readcmd;
  1107. readcmd = ONENAND_IS_4KB_PAGE(this) ?
  1108. ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1109. this->command(mtd, readcmd, to, mtd->oobsize);
  1110. onenand_update_bufferram(mtd, to, 0);
  1111. status = this->wait(mtd, FL_READING);
  1112. if (status)
  1113. return status;
  1114. this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  1115. for (i = 0; i < mtd->oobsize; i++)
  1116. if (buf[i] != 0xFF && buf[i] != oob_buf[i])
  1117. return -EBADMSG;
  1118. return 0;
  1119. }
  1120. /**
  1121. * onenand_verify - [GENERIC] verify the chip contents after a write
  1122. * @param mtd MTD device structure
  1123. * @param buf the databuffer to verify
  1124. * @param addr offset to read from
  1125. * @param len number of bytes to read and compare
  1126. */
  1127. static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
  1128. {
  1129. struct onenand_chip *this = mtd->priv;
  1130. void __iomem *dataram;
  1131. int ret = 0;
  1132. int thislen, column;
  1133. while (len != 0) {
  1134. thislen = min_t(int, this->writesize, len);
  1135. column = addr & (this->writesize - 1);
  1136. if (column + thislen > this->writesize)
  1137. thislen = this->writesize - column;
  1138. this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
  1139. onenand_update_bufferram(mtd, addr, 0);
  1140. ret = this->wait(mtd, FL_READING);
  1141. if (ret)
  1142. return ret;
  1143. onenand_update_bufferram(mtd, addr, 1);
  1144. dataram = this->base + ONENAND_DATARAM;
  1145. dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
  1146. if (memcmp(buf, dataram + column, thislen))
  1147. return -EBADMSG;
  1148. len -= thislen;
  1149. buf += thislen;
  1150. addr += thislen;
  1151. }
  1152. return 0;
  1153. }
  1154. #else
  1155. #define onenand_verify(...) (0)
  1156. #define onenand_verify_oob(...) (0)
  1157. #endif
  1158. #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
  1159. /**
  1160. * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
  1161. * @param mtd MTD device structure
  1162. * @param oob_buf oob buffer
  1163. * @param buf source address
  1164. * @param column oob offset to write to
  1165. * @param thislen oob length to write
  1166. */
  1167. static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
  1168. const u_char *buf, int column, int thislen)
  1169. {
  1170. struct onenand_chip *this = mtd->priv;
  1171. struct nand_oobfree *free;
  1172. int writecol = column;
  1173. int writeend = column + thislen;
  1174. int lastgap = 0;
  1175. unsigned int i;
  1176. free = this->ecclayout->oobfree;
  1177. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE && free->length;
  1178. i++, free++) {
  1179. if (writecol >= lastgap)
  1180. writecol += free->offset - lastgap;
  1181. if (writeend >= lastgap)
  1182. writeend += free->offset - lastgap;
  1183. lastgap = free->offset + free->length;
  1184. }
  1185. free = this->ecclayout->oobfree;
  1186. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE && free->length;
  1187. i++, free++) {
  1188. int free_end = free->offset + free->length;
  1189. if (free->offset < writeend && free_end > writecol) {
  1190. int st = max_t(int,free->offset,writecol);
  1191. int ed = min_t(int,free_end,writeend);
  1192. int n = ed - st;
  1193. memcpy(oob_buf + st, buf, n);
  1194. buf += n;
  1195. } else if (column == 0)
  1196. break;
  1197. }
  1198. return 0;
  1199. }
  1200. /**
  1201. * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
  1202. * @param mtd MTD device structure
  1203. * @param to offset to write to
  1204. * @param ops oob operation description structure
  1205. *
  1206. * Write main and/or oob with ECC
  1207. */
  1208. static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
  1209. struct mtd_oob_ops *ops)
  1210. {
  1211. struct onenand_chip *this = mtd->priv;
  1212. int written = 0, column, thislen, subpage;
  1213. int oobwritten = 0, oobcolumn, thisooblen, oobsize;
  1214. size_t len = ops->len;
  1215. size_t ooblen = ops->ooblen;
  1216. const u_char *buf = ops->datbuf;
  1217. const u_char *oob = ops->oobbuf;
  1218. u_char *oobbuf;
  1219. int ret = 0;
  1220. pr_debug("onenand_write_ops_nolock: to = 0x%08x, len = %i\n",
  1221. (unsigned int) to, (int) len);
  1222. /* Initialize retlen, in case of early exit */
  1223. ops->retlen = 0;
  1224. ops->oobretlen = 0;
  1225. /* Reject writes, which are not page aligned */
  1226. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1227. printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
  1228. return -EINVAL;
  1229. }
  1230. if (ops->mode == MTD_OPS_AUTO_OOB)
  1231. oobsize = this->ecclayout->oobavail;
  1232. else
  1233. oobsize = mtd->oobsize;
  1234. oobcolumn = to & (mtd->oobsize - 1);
  1235. column = to & (mtd->writesize - 1);
  1236. /* Loop until all data write */
  1237. while (written < len) {
  1238. u_char *wbuf = (u_char *) buf;
  1239. thislen = min_t(int, mtd->writesize - column, len - written);
  1240. thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
  1241. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1242. /* Partial page write */
  1243. subpage = thislen < mtd->writesize;
  1244. if (subpage) {
  1245. memset(this->page_buf, 0xff, mtd->writesize);
  1246. memcpy(this->page_buf + column, buf, thislen);
  1247. wbuf = this->page_buf;
  1248. }
  1249. this->write_bufferram(mtd, to, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1250. if (oob) {
  1251. oobbuf = this->oob_buf;
  1252. /* We send data to spare ram with oobsize
  1253. * * to prevent byte access */
  1254. memset(oobbuf, 0xff, mtd->oobsize);
  1255. if (ops->mode == MTD_OPS_AUTO_OOB)
  1256. onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
  1257. else
  1258. memcpy(oobbuf + oobcolumn, oob, thisooblen);
  1259. oobwritten += thisooblen;
  1260. oob += thisooblen;
  1261. oobcolumn = 0;
  1262. } else
  1263. oobbuf = (u_char *) ffchars;
  1264. this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1265. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1266. ret = this->wait(mtd, FL_WRITING);
  1267. /* In partial page write we don't update bufferram */
  1268. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1269. if (ONENAND_IS_2PLANE(this)) {
  1270. ONENAND_SET_BUFFERRAM1(this);
  1271. onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
  1272. }
  1273. if (ret) {
  1274. printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
  1275. break;
  1276. }
  1277. /* Only check verify write turn on */
  1278. ret = onenand_verify(mtd, buf, to, thislen);
  1279. if (ret) {
  1280. printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
  1281. break;
  1282. }
  1283. written += thislen;
  1284. if (written == len)
  1285. break;
  1286. column = 0;
  1287. to += thislen;
  1288. buf += thislen;
  1289. }
  1290. ops->retlen = written;
  1291. return ret;
  1292. }
  1293. /**
  1294. * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
  1295. * @param mtd MTD device structure
  1296. * @param to offset to write to
  1297. * @param len number of bytes to write
  1298. * @param retlen pointer to variable to store the number of written bytes
  1299. * @param buf the data to write
  1300. * @param mode operation mode
  1301. *
  1302. * OneNAND write out-of-band
  1303. */
  1304. static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  1305. struct mtd_oob_ops *ops)
  1306. {
  1307. struct onenand_chip *this = mtd->priv;
  1308. int column, ret = 0, oobsize;
  1309. int written = 0, oobcmd;
  1310. u_char *oobbuf;
  1311. size_t len = ops->ooblen;
  1312. const u_char *buf = ops->oobbuf;
  1313. unsigned int mode = ops->mode;
  1314. to += ops->ooboffs;
  1315. pr_debug("onenand_write_oob_nolock: to = 0x%08x, len = %i\n",
  1316. (unsigned int) to, (int) len);
  1317. /* Initialize retlen, in case of early exit */
  1318. ops->oobretlen = 0;
  1319. if (mode == MTD_OPS_AUTO_OOB)
  1320. oobsize = this->ecclayout->oobavail;
  1321. else
  1322. oobsize = mtd->oobsize;
  1323. column = to & (mtd->oobsize - 1);
  1324. if (unlikely(column >= oobsize)) {
  1325. printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
  1326. return -EINVAL;
  1327. }
  1328. /* For compatibility with NAND: Do not allow write past end of page */
  1329. if (unlikely(column + len > oobsize)) {
  1330. printk(KERN_ERR "onenand_write_oob_nolock: "
  1331. "Attempt to write past end of page\n");
  1332. return -EINVAL;
  1333. }
  1334. /* Do not allow reads past end of device */
  1335. if (unlikely(to >= mtd->size ||
  1336. column + len > ((mtd->size >> this->page_shift) -
  1337. (to >> this->page_shift)) * oobsize)) {
  1338. printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
  1339. return -EINVAL;
  1340. }
  1341. oobbuf = this->oob_buf;
  1342. oobcmd = ONENAND_IS_4KB_PAGE(this) ?
  1343. ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
  1344. /* Loop until all data write */
  1345. while (written < len) {
  1346. int thislen = min_t(int, oobsize, len - written);
  1347. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
  1348. /* We send data to spare ram with oobsize
  1349. * to prevent byte access */
  1350. memset(oobbuf, 0xff, mtd->oobsize);
  1351. if (mode == MTD_OPS_AUTO_OOB)
  1352. onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
  1353. else
  1354. memcpy(oobbuf + column, buf, thislen);
  1355. this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1356. if (ONENAND_IS_4KB_PAGE(this)) {
  1357. /* Set main area of DataRAM to 0xff*/
  1358. memset(this->page_buf, 0xff, mtd->writesize);
  1359. this->write_bufferram(mtd, 0, ONENAND_DATARAM,
  1360. this->page_buf, 0, mtd->writesize);
  1361. }
  1362. this->command(mtd, oobcmd, to, mtd->oobsize);
  1363. onenand_update_bufferram(mtd, to, 0);
  1364. if (ONENAND_IS_2PLANE(this)) {
  1365. ONENAND_SET_BUFFERRAM1(this);
  1366. onenand_update_bufferram(mtd, to + this->writesize, 0);
  1367. }
  1368. ret = this->wait(mtd, FL_WRITING);
  1369. if (ret) {
  1370. printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
  1371. break;
  1372. }
  1373. ret = onenand_verify_oob(mtd, oobbuf, to);
  1374. if (ret) {
  1375. printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
  1376. break;
  1377. }
  1378. written += thislen;
  1379. if (written == len)
  1380. break;
  1381. to += mtd->writesize;
  1382. buf += thislen;
  1383. column = 0;
  1384. }
  1385. ops->oobretlen = written;
  1386. return ret;
  1387. }
  1388. /**
  1389. * onenand_write - [MTD Interface] compability function for onenand_write_ecc
  1390. * @param mtd MTD device structure
  1391. * @param to offset to write to
  1392. * @param len number of bytes to write
  1393. * @param retlen pointer to variable to store the number of written bytes
  1394. * @param buf the data to write
  1395. *
  1396. * Write with ECC
  1397. */
  1398. int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
  1399. size_t * retlen, const u_char * buf)
  1400. {
  1401. struct mtd_oob_ops ops = {
  1402. .len = len,
  1403. .ooblen = 0,
  1404. .datbuf = (u_char *) buf,
  1405. .oobbuf = NULL,
  1406. };
  1407. int ret;
  1408. onenand_get_device(mtd, FL_WRITING);
  1409. ret = onenand_write_ops_nolock(mtd, to, &ops);
  1410. onenand_release_device(mtd);
  1411. *retlen = ops.retlen;
  1412. return ret;
  1413. }
  1414. /**
  1415. * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
  1416. * @param mtd MTD device structure
  1417. * @param to offset to write to
  1418. * @param ops oob operation description structure
  1419. *
  1420. * OneNAND write main and/or out-of-band
  1421. */
  1422. int onenand_write_oob(struct mtd_info *mtd, loff_t to,
  1423. struct mtd_oob_ops *ops)
  1424. {
  1425. int ret;
  1426. switch (ops->mode) {
  1427. case MTD_OPS_PLACE_OOB:
  1428. case MTD_OPS_AUTO_OOB:
  1429. break;
  1430. case MTD_OPS_RAW:
  1431. /* Not implemented yet */
  1432. default:
  1433. return -EINVAL;
  1434. }
  1435. onenand_get_device(mtd, FL_WRITING);
  1436. if (ops->datbuf)
  1437. ret = onenand_write_ops_nolock(mtd, to, ops);
  1438. else
  1439. ret = onenand_write_oob_nolock(mtd, to, ops);
  1440. onenand_release_device(mtd);
  1441. return ret;
  1442. }
  1443. /**
  1444. * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
  1445. * @param mtd MTD device structure
  1446. * @param ofs offset from device start
  1447. * @param allowbbt 1, if its allowed to access the bbt area
  1448. *
  1449. * Check, if the block is bad, Either by reading the bad block table or
  1450. * calling of the scan function.
  1451. */
  1452. static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
  1453. {
  1454. struct onenand_chip *this = mtd->priv;
  1455. struct bbm_info *bbm = this->bbm;
  1456. /* Return info from the table */
  1457. return bbm->isbad_bbt(mtd, ofs, allowbbt);
  1458. }
  1459. /**
  1460. * onenand_erase - [MTD Interface] erase block(s)
  1461. * @param mtd MTD device structure
  1462. * @param instr erase instruction
  1463. *
  1464. * Erase one ore more blocks
  1465. */
  1466. int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
  1467. {
  1468. struct onenand_chip *this = mtd->priv;
  1469. unsigned int block_size;
  1470. loff_t addr = instr->addr;
  1471. unsigned int len = instr->len;
  1472. int ret = 0, i;
  1473. struct mtd_erase_region_info *region = NULL;
  1474. unsigned int region_end = 0;
  1475. pr_debug("onenand_erase: start = 0x%08x, len = %i\n",
  1476. (unsigned int) addr, len);
  1477. if (FLEXONENAND(this)) {
  1478. /* Find the eraseregion of this address */
  1479. i = flexonenand_region(mtd, addr);
  1480. region = &mtd->eraseregions[i];
  1481. block_size = region->erasesize;
  1482. region_end = region->offset
  1483. + region->erasesize * region->numblocks;
  1484. /* Start address within region must align on block boundary.
  1485. * Erase region's start offset is always block start address.
  1486. */
  1487. if (unlikely((addr - region->offset) & (block_size - 1))) {
  1488. pr_debug("onenand_erase:" " Unaligned address\n");
  1489. return -EINVAL;
  1490. }
  1491. } else {
  1492. block_size = 1 << this->erase_shift;
  1493. /* Start address must align on block boundary */
  1494. if (unlikely(addr & (block_size - 1))) {
  1495. pr_debug("onenand_erase:" "Unaligned address\n");
  1496. return -EINVAL;
  1497. }
  1498. }
  1499. /* Length must align on block boundary */
  1500. if (unlikely(len & (block_size - 1))) {
  1501. pr_debug("onenand_erase: Length not block aligned\n");
  1502. return -EINVAL;
  1503. }
  1504. /* Grab the lock and see if the device is available */
  1505. onenand_get_device(mtd, FL_ERASING);
  1506. /* Loop throught the pages */
  1507. instr->state = MTD_ERASING;
  1508. while (len) {
  1509. /* Check if we have a bad block, we do not erase bad blocks */
  1510. if (instr->priv == 0 && onenand_block_isbad_nolock(mtd, addr, 0)) {
  1511. printk(KERN_WARNING "onenand_erase: attempt to erase"
  1512. " a bad block at addr 0x%08x\n",
  1513. (unsigned int) addr);
  1514. instr->state = MTD_ERASE_FAILED;
  1515. goto erase_exit;
  1516. }
  1517. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  1518. onenand_invalidate_bufferram(mtd, addr, block_size);
  1519. ret = this->wait(mtd, FL_ERASING);
  1520. /* Check, if it is write protected */
  1521. if (ret) {
  1522. if (ret == -EPERM)
  1523. pr_debug("onenand_erase: "
  1524. "Device is write protected!!!\n");
  1525. else
  1526. pr_debug("onenand_erase: "
  1527. "Failed erase, block %d\n",
  1528. onenand_block(this, addr));
  1529. instr->state = MTD_ERASE_FAILED;
  1530. instr->fail_addr = addr;
  1531. goto erase_exit;
  1532. }
  1533. len -= block_size;
  1534. addr += block_size;
  1535. if (addr == region_end) {
  1536. if (!len)
  1537. break;
  1538. region++;
  1539. block_size = region->erasesize;
  1540. region_end = region->offset
  1541. + region->erasesize * region->numblocks;
  1542. if (len & (block_size - 1)) {
  1543. /* This has been checked at MTD
  1544. * partitioning level. */
  1545. printk("onenand_erase: Unaligned address\n");
  1546. goto erase_exit;
  1547. }
  1548. }
  1549. }
  1550. instr->state = MTD_ERASE_DONE;
  1551. erase_exit:
  1552. ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
  1553. /* Do call back function */
  1554. if (!ret)
  1555. mtd_erase_callback(instr);
  1556. /* Deselect and wake up anyone waiting on the device */
  1557. onenand_release_device(mtd);
  1558. return ret;
  1559. }
  1560. /**
  1561. * onenand_sync - [MTD Interface] sync
  1562. * @param mtd MTD device structure
  1563. *
  1564. * Sync is actually a wait for chip ready function
  1565. */
  1566. void onenand_sync(struct mtd_info *mtd)
  1567. {
  1568. pr_debug("onenand_sync: called\n");
  1569. /* Grab the lock and see if the device is available */
  1570. onenand_get_device(mtd, FL_SYNCING);
  1571. /* Release it and go back */
  1572. onenand_release_device(mtd);
  1573. }
  1574. /**
  1575. * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
  1576. * @param mtd MTD device structure
  1577. * @param ofs offset relative to mtd start
  1578. *
  1579. * Check whether the block is bad
  1580. */
  1581. int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
  1582. {
  1583. int ret;
  1584. /* Check for invalid offset */
  1585. if (ofs > mtd->size)
  1586. return -EINVAL;
  1587. onenand_get_device(mtd, FL_READING);
  1588. ret = onenand_block_isbad_nolock(mtd,ofs, 0);
  1589. onenand_release_device(mtd);
  1590. return ret;
  1591. }
  1592. /**
  1593. * onenand_default_block_markbad - [DEFAULT] mark a block bad
  1594. * @param mtd MTD device structure
  1595. * @param ofs offset from device start
  1596. *
  1597. * This is the default implementation, which can be overridden by
  1598. * a hardware specific driver.
  1599. */
  1600. static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1601. {
  1602. struct onenand_chip *this = mtd->priv;
  1603. struct bbm_info *bbm = this->bbm;
  1604. u_char buf[2] = {0, 0};
  1605. struct mtd_oob_ops ops = {
  1606. .mode = MTD_OPS_PLACE_OOB,
  1607. .ooblen = 2,
  1608. .oobbuf = buf,
  1609. .ooboffs = 0,
  1610. };
  1611. int block;
  1612. /* Get block number */
  1613. block = onenand_block(this, ofs);
  1614. if (bbm->bbt)
  1615. bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
  1616. /* We write two bytes, so we dont have to mess with 16 bit access */
  1617. ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
  1618. return onenand_write_oob_nolock(mtd, ofs, &ops);
  1619. }
  1620. /**
  1621. * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
  1622. * @param mtd MTD device structure
  1623. * @param ofs offset relative to mtd start
  1624. *
  1625. * Mark the block as bad
  1626. */
  1627. int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1628. {
  1629. struct onenand_chip *this = mtd->priv;
  1630. int ret;
  1631. ret = onenand_block_isbad(mtd, ofs);
  1632. if (ret) {
  1633. /* If it was bad already, return success and do nothing */
  1634. if (ret > 0)
  1635. return 0;
  1636. return ret;
  1637. }
  1638. onenand_get_device(mtd, FL_WRITING);
  1639. ret = this->block_markbad(mtd, ofs);
  1640. onenand_release_device(mtd);
  1641. return ret;
  1642. }
  1643. /**
  1644. * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
  1645. * @param mtd MTD device structure
  1646. * @param ofs offset relative to mtd start
  1647. * @param len number of bytes to lock or unlock
  1648. * @param cmd lock or unlock command
  1649. *
  1650. * Lock or unlock one or more blocks
  1651. */
  1652. static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
  1653. {
  1654. struct onenand_chip *this = mtd->priv;
  1655. int start, end, block, value, status;
  1656. start = onenand_block(this, ofs);
  1657. end = onenand_block(this, ofs + len);
  1658. /* Continuous lock scheme */
  1659. if (this->options & ONENAND_HAS_CONT_LOCK) {
  1660. /* Set start block address */
  1661. this->write_word(start,
  1662. this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1663. /* Set end block address */
  1664. this->write_word(end - 1,
  1665. this->base + ONENAND_REG_END_BLOCK_ADDRESS);
  1666. /* Write unlock command */
  1667. this->command(mtd, cmd, 0, 0);
  1668. /* There's no return value */
  1669. this->wait(mtd, FL_UNLOCKING);
  1670. /* Sanity check */
  1671. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1672. & ONENAND_CTRL_ONGO)
  1673. continue;
  1674. /* Check lock status */
  1675. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1676. if (!(status & ONENAND_WP_US))
  1677. printk(KERN_ERR "wp status = 0x%x\n", status);
  1678. return 0;
  1679. }
  1680. /* Block lock scheme */
  1681. for (block = start; block < end; block++) {
  1682. /* Set block address */
  1683. value = onenand_block_address(this, block);
  1684. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  1685. /* Select DataRAM for DDP */
  1686. value = onenand_bufferram_address(this, block);
  1687. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  1688. /* Set start block address */
  1689. this->write_word(block,
  1690. this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1691. /* Write unlock command */
  1692. this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
  1693. /* There's no return value */
  1694. this->wait(mtd, FL_UNLOCKING);
  1695. /* Sanity check */
  1696. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1697. & ONENAND_CTRL_ONGO)
  1698. continue;
  1699. /* Check lock status */
  1700. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1701. if (!(status & ONENAND_WP_US))
  1702. printk(KERN_ERR "block = %d, wp status = 0x%x\n",
  1703. block, status);
  1704. }
  1705. return 0;
  1706. }
  1707. #ifdef ONENAND_LINUX
  1708. /**
  1709. * onenand_lock - [MTD Interface] Lock block(s)
  1710. * @param mtd MTD device structure
  1711. * @param ofs offset relative to mtd start
  1712. * @param len number of bytes to unlock
  1713. *
  1714. * Lock one or more blocks
  1715. */
  1716. static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
  1717. {
  1718. int ret;
  1719. onenand_get_device(mtd, FL_LOCKING);
  1720. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
  1721. onenand_release_device(mtd);
  1722. return ret;
  1723. }
  1724. /**
  1725. * onenand_unlock - [MTD Interface] Unlock block(s)
  1726. * @param mtd MTD device structure
  1727. * @param ofs offset relative to mtd start
  1728. * @param len number of bytes to unlock
  1729. *
  1730. * Unlock one or more blocks
  1731. */
  1732. static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
  1733. {
  1734. int ret;
  1735. onenand_get_device(mtd, FL_LOCKING);
  1736. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  1737. onenand_release_device(mtd);
  1738. return ret;
  1739. }
  1740. #endif
  1741. /**
  1742. * onenand_check_lock_status - [OneNAND Interface] Check lock status
  1743. * @param this onenand chip data structure
  1744. *
  1745. * Check lock status
  1746. */
  1747. static int onenand_check_lock_status(struct onenand_chip *this)
  1748. {
  1749. unsigned int value, block, status;
  1750. unsigned int end;
  1751. end = this->chipsize >> this->erase_shift;
  1752. for (block = 0; block < end; block++) {
  1753. /* Set block address */
  1754. value = onenand_block_address(this, block);
  1755. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  1756. /* Select DataRAM for DDP */
  1757. value = onenand_bufferram_address(this, block);
  1758. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  1759. /* Set start block address */
  1760. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1761. /* Check lock status */
  1762. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1763. if (!(status & ONENAND_WP_US)) {
  1764. printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
  1765. return 0;
  1766. }
  1767. }
  1768. return 1;
  1769. }
  1770. /**
  1771. * onenand_unlock_all - [OneNAND Interface] unlock all blocks
  1772. * @param mtd MTD device structure
  1773. *
  1774. * Unlock all blocks
  1775. */
  1776. static void onenand_unlock_all(struct mtd_info *mtd)
  1777. {
  1778. struct onenand_chip *this = mtd->priv;
  1779. loff_t ofs = 0;
  1780. size_t len = mtd->size;
  1781. if (this->options & ONENAND_HAS_UNLOCK_ALL) {
  1782. /* Set start block address */
  1783. this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1784. /* Write unlock command */
  1785. this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
  1786. /* There's no return value */
  1787. this->wait(mtd, FL_LOCKING);
  1788. /* Sanity check */
  1789. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1790. & ONENAND_CTRL_ONGO)
  1791. continue;
  1792. /* Check lock status */
  1793. if (onenand_check_lock_status(this))
  1794. return;
  1795. /* Workaround for all block unlock in DDP */
  1796. if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
  1797. /* All blocks on another chip */
  1798. ofs = this->chipsize >> 1;
  1799. len = this->chipsize >> 1;
  1800. }
  1801. }
  1802. onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  1803. }
  1804. /**
  1805. * onenand_check_features - Check and set OneNAND features
  1806. * @param mtd MTD data structure
  1807. *
  1808. * Check and set OneNAND features
  1809. * - lock scheme
  1810. * - two plane
  1811. */
  1812. static void onenand_check_features(struct mtd_info *mtd)
  1813. {
  1814. struct onenand_chip *this = mtd->priv;
  1815. unsigned int density, process;
  1816. /* Lock scheme depends on density and process */
  1817. density = onenand_get_density(this->device_id);
  1818. process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
  1819. /* Lock scheme */
  1820. switch (density) {
  1821. case ONENAND_DEVICE_DENSITY_4Gb:
  1822. if (ONENAND_IS_DDP(this))
  1823. this->options |= ONENAND_HAS_2PLANE;
  1824. else
  1825. this->options |= ONENAND_HAS_4KB_PAGE;
  1826. case ONENAND_DEVICE_DENSITY_2Gb:
  1827. /* 2Gb DDP don't have 2 plane */
  1828. if (!ONENAND_IS_DDP(this))
  1829. this->options |= ONENAND_HAS_2PLANE;
  1830. this->options |= ONENAND_HAS_UNLOCK_ALL;
  1831. case ONENAND_DEVICE_DENSITY_1Gb:
  1832. /* A-Die has all block unlock */
  1833. if (process)
  1834. this->options |= ONENAND_HAS_UNLOCK_ALL;
  1835. break;
  1836. default:
  1837. /* Some OneNAND has continuous lock scheme */
  1838. if (!process)
  1839. this->options |= ONENAND_HAS_CONT_LOCK;
  1840. break;
  1841. }
  1842. if (ONENAND_IS_MLC(this))
  1843. this->options |= ONENAND_HAS_4KB_PAGE;
  1844. if (ONENAND_IS_4KB_PAGE(this))
  1845. this->options &= ~ONENAND_HAS_2PLANE;
  1846. if (FLEXONENAND(this)) {
  1847. this->options &= ~ONENAND_HAS_CONT_LOCK;
  1848. this->options |= ONENAND_HAS_UNLOCK_ALL;
  1849. }
  1850. if (this->options & ONENAND_HAS_CONT_LOCK)
  1851. printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
  1852. if (this->options & ONENAND_HAS_UNLOCK_ALL)
  1853. printk(KERN_DEBUG "Chip support all block unlock\n");
  1854. if (this->options & ONENAND_HAS_2PLANE)
  1855. printk(KERN_DEBUG "Chip has 2 plane\n");
  1856. if (this->options & ONENAND_HAS_4KB_PAGE)
  1857. printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
  1858. }
  1859. /**
  1860. * onenand_print_device_info - Print device ID
  1861. * @param device device ID
  1862. *
  1863. * Print device ID
  1864. */
  1865. char *onenand_print_device_info(int device, int version)
  1866. {
  1867. int vcc, demuxed, ddp, density, flexonenand;
  1868. char *dev_info = malloc(80);
  1869. char *p = dev_info;
  1870. vcc = device & ONENAND_DEVICE_VCC_MASK;
  1871. demuxed = device & ONENAND_DEVICE_IS_DEMUX;
  1872. ddp = device & ONENAND_DEVICE_IS_DDP;
  1873. density = onenand_get_density(device);
  1874. flexonenand = device & DEVICE_IS_FLEXONENAND;
  1875. p += sprintf(dev_info, "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
  1876. demuxed ? "" : "Muxed ",
  1877. flexonenand ? "Flex-" : "",
  1878. ddp ? "(DDP)" : "",
  1879. (16 << density), vcc ? "2.65/3.3" : "1.8", device);
  1880. sprintf(p, "\nOneNAND version = 0x%04x", version);
  1881. printk("%s\n", dev_info);
  1882. return dev_info;
  1883. }
  1884. static const struct onenand_manufacturers onenand_manuf_ids[] = {
  1885. {ONENAND_MFR_NUMONYX, "Numonyx"},
  1886. {ONENAND_MFR_SAMSUNG, "Samsung"},
  1887. };
  1888. /**
  1889. * onenand_check_maf - Check manufacturer ID
  1890. * @param manuf manufacturer ID
  1891. *
  1892. * Check manufacturer ID
  1893. */
  1894. static int onenand_check_maf(int manuf)
  1895. {
  1896. int size = ARRAY_SIZE(onenand_manuf_ids);
  1897. int i;
  1898. #ifdef ONENAND_DEBUG
  1899. char *name;
  1900. #endif
  1901. for (i = 0; i < size; i++)
  1902. if (manuf == onenand_manuf_ids[i].id)
  1903. break;
  1904. #ifdef ONENAND_DEBUG
  1905. if (i < size)
  1906. name = onenand_manuf_ids[i].name;
  1907. else
  1908. name = "Unknown";
  1909. printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
  1910. #endif
  1911. return i == size;
  1912. }
  1913. /**
  1914. * flexonenand_get_boundary - Reads the SLC boundary
  1915. * @param onenand_info - onenand info structure
  1916. *
  1917. * Fill up boundary[] field in onenand_chip
  1918. **/
  1919. static int flexonenand_get_boundary(struct mtd_info *mtd)
  1920. {
  1921. struct onenand_chip *this = mtd->priv;
  1922. unsigned int die, bdry;
  1923. int syscfg, locked;
  1924. /* Disable ECC */
  1925. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  1926. this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
  1927. for (die = 0; die < this->dies; die++) {
  1928. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  1929. this->wait(mtd, FL_SYNCING);
  1930. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  1931. this->wait(mtd, FL_READING);
  1932. bdry = this->read_word(this->base + ONENAND_DATARAM);
  1933. if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
  1934. locked = 0;
  1935. else
  1936. locked = 1;
  1937. this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
  1938. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1939. this->wait(mtd, FL_RESETING);
  1940. printk(KERN_INFO "Die %d boundary: %d%s\n", die,
  1941. this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
  1942. }
  1943. /* Enable ECC */
  1944. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  1945. return 0;
  1946. }
  1947. /**
  1948. * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
  1949. * boundary[], diesize[], mtd->size, mtd->erasesize,
  1950. * mtd->eraseregions
  1951. * @param mtd - MTD device structure
  1952. */
  1953. static void flexonenand_get_size(struct mtd_info *mtd)
  1954. {
  1955. struct onenand_chip *this = mtd->priv;
  1956. int die, i, eraseshift, density;
  1957. int blksperdie, maxbdry;
  1958. loff_t ofs;
  1959. density = onenand_get_density(this->device_id);
  1960. blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
  1961. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  1962. maxbdry = blksperdie - 1;
  1963. eraseshift = this->erase_shift - 1;
  1964. mtd->numeraseregions = this->dies << 1;
  1965. /* This fills up the device boundary */
  1966. flexonenand_get_boundary(mtd);
  1967. die = 0;
  1968. ofs = 0;
  1969. i = -1;
  1970. for (; die < this->dies; die++) {
  1971. if (!die || this->boundary[die-1] != maxbdry) {
  1972. i++;
  1973. mtd->eraseregions[i].offset = ofs;
  1974. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  1975. mtd->eraseregions[i].numblocks =
  1976. this->boundary[die] + 1;
  1977. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  1978. eraseshift++;
  1979. } else {
  1980. mtd->numeraseregions -= 1;
  1981. mtd->eraseregions[i].numblocks +=
  1982. this->boundary[die] + 1;
  1983. ofs += (this->boundary[die] + 1) << (eraseshift - 1);
  1984. }
  1985. if (this->boundary[die] != maxbdry) {
  1986. i++;
  1987. mtd->eraseregions[i].offset = ofs;
  1988. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  1989. mtd->eraseregions[i].numblocks = maxbdry ^
  1990. this->boundary[die];
  1991. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  1992. eraseshift--;
  1993. } else
  1994. mtd->numeraseregions -= 1;
  1995. }
  1996. /* Expose MLC erase size except when all blocks are SLC */
  1997. mtd->erasesize = 1 << this->erase_shift;
  1998. if (mtd->numeraseregions == 1)
  1999. mtd->erasesize >>= 1;
  2000. printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
  2001. for (i = 0; i < mtd->numeraseregions; i++)
  2002. printk(KERN_INFO "[offset: 0x%08llx, erasesize: 0x%05x,"
  2003. " numblocks: %04u]\n", mtd->eraseregions[i].offset,
  2004. mtd->eraseregions[i].erasesize,
  2005. mtd->eraseregions[i].numblocks);
  2006. for (die = 0, mtd->size = 0; die < this->dies; die++) {
  2007. this->diesize[die] = (loff_t) (blksperdie << this->erase_shift);
  2008. this->diesize[die] -= (loff_t) (this->boundary[die] + 1)
  2009. << (this->erase_shift - 1);
  2010. mtd->size += this->diesize[die];
  2011. }
  2012. }
  2013. /**
  2014. * flexonenand_check_blocks_erased - Check if blocks are erased
  2015. * @param mtd_info - mtd info structure
  2016. * @param start - first erase block to check
  2017. * @param end - last erase block to check
  2018. *
  2019. * Converting an unerased block from MLC to SLC
  2020. * causes byte values to change. Since both data and its ECC
  2021. * have changed, reads on the block give uncorrectable error.
  2022. * This might lead to the block being detected as bad.
  2023. *
  2024. * Avoid this by ensuring that the block to be converted is
  2025. * erased.
  2026. */
  2027. static int flexonenand_check_blocks_erased(struct mtd_info *mtd,
  2028. int start, int end)
  2029. {
  2030. struct onenand_chip *this = mtd->priv;
  2031. int i, ret;
  2032. int block;
  2033. struct mtd_oob_ops ops = {
  2034. .mode = MTD_OPS_PLACE_OOB,
  2035. .ooboffs = 0,
  2036. .ooblen = mtd->oobsize,
  2037. .datbuf = NULL,
  2038. .oobbuf = this->oob_buf,
  2039. };
  2040. loff_t addr;
  2041. printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
  2042. for (block = start; block <= end; block++) {
  2043. addr = flexonenand_addr(this, block);
  2044. if (onenand_block_isbad_nolock(mtd, addr, 0))
  2045. continue;
  2046. /*
  2047. * Since main area write results in ECC write to spare,
  2048. * it is sufficient to check only ECC bytes for change.
  2049. */
  2050. ret = onenand_read_oob_nolock(mtd, addr, &ops);
  2051. if (ret)
  2052. return ret;
  2053. for (i = 0; i < mtd->oobsize; i++)
  2054. if (this->oob_buf[i] != 0xff)
  2055. break;
  2056. if (i != mtd->oobsize) {
  2057. printk(KERN_WARNING "Block %d not erased.\n", block);
  2058. return 1;
  2059. }
  2060. }
  2061. return 0;
  2062. }
  2063. /**
  2064. * flexonenand_set_boundary - Writes the SLC boundary
  2065. * @param mtd - mtd info structure
  2066. */
  2067. int flexonenand_set_boundary(struct mtd_info *mtd, int die,
  2068. int boundary, int lock)
  2069. {
  2070. struct onenand_chip *this = mtd->priv;
  2071. int ret, density, blksperdie, old, new, thisboundary;
  2072. loff_t addr;
  2073. if (die >= this->dies)
  2074. return -EINVAL;
  2075. if (boundary == this->boundary[die])
  2076. return 0;
  2077. density = onenand_get_density(this->device_id);
  2078. blksperdie = ((16 << density) << 20) >> this->erase_shift;
  2079. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  2080. if (boundary >= blksperdie) {
  2081. printk("flexonenand_set_boundary:"
  2082. "Invalid boundary value. "
  2083. "Boundary not changed.\n");
  2084. return -EINVAL;
  2085. }
  2086. /* Check if converting blocks are erased */
  2087. old = this->boundary[die] + (die * this->density_mask);
  2088. new = boundary + (die * this->density_mask);
  2089. ret = flexonenand_check_blocks_erased(mtd, min(old, new)
  2090. + 1, max(old, new));
  2091. if (ret) {
  2092. printk(KERN_ERR "flexonenand_set_boundary: Please erase blocks before boundary change\n");
  2093. return ret;
  2094. }
  2095. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  2096. this->wait(mtd, FL_SYNCING);
  2097. /* Check is boundary is locked */
  2098. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  2099. ret = this->wait(mtd, FL_READING);
  2100. thisboundary = this->read_word(this->base + ONENAND_DATARAM);
  2101. if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
  2102. printk(KERN_ERR "flexonenand_set_boundary: boundary locked\n");
  2103. goto out;
  2104. }
  2105. printk(KERN_INFO "flexonenand_set_boundary: Changing die %d boundary: %d%s\n",
  2106. die, boundary, lock ? "(Locked)" : "(Unlocked)");
  2107. boundary &= FLEXONENAND_PI_MASK;
  2108. boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
  2109. addr = die ? this->diesize[0] : 0;
  2110. this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
  2111. ret = this->wait(mtd, FL_ERASING);
  2112. if (ret) {
  2113. printk("flexonenand_set_boundary:"
  2114. "Failed PI erase for Die %d\n", die);
  2115. goto out;
  2116. }
  2117. this->write_word(boundary, this->base + ONENAND_DATARAM);
  2118. this->command(mtd, ONENAND_CMD_PROG, addr, 0);
  2119. ret = this->wait(mtd, FL_WRITING);
  2120. if (ret) {
  2121. printk("flexonenand_set_boundary:"
  2122. "Failed PI write for Die %d\n", die);
  2123. goto out;
  2124. }
  2125. this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
  2126. ret = this->wait(mtd, FL_WRITING);
  2127. out:
  2128. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
  2129. this->wait(mtd, FL_RESETING);
  2130. if (!ret)
  2131. /* Recalculate device size on boundary change*/
  2132. flexonenand_get_size(mtd);
  2133. return ret;
  2134. }
  2135. /**
  2136. * onenand_chip_probe - [OneNAND Interface] Probe the OneNAND chip
  2137. * @param mtd MTD device structure
  2138. *
  2139. * OneNAND detection method:
  2140. * Compare the the values from command with ones from register
  2141. */
  2142. static int onenand_chip_probe(struct mtd_info *mtd)
  2143. {
  2144. struct onenand_chip *this = mtd->priv;
  2145. int bram_maf_id, bram_dev_id, maf_id, dev_id;
  2146. int syscfg;
  2147. /* Save system configuration 1 */
  2148. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  2149. /* Clear Sync. Burst Read mode to read BootRAM */
  2150. this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ),
  2151. this->base + ONENAND_REG_SYS_CFG1);
  2152. /* Send the command for reading device ID from BootRAM */
  2153. this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
  2154. /* Read manufacturer and device IDs from BootRAM */
  2155. bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
  2156. bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
  2157. /* Reset OneNAND to read default register values */
  2158. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
  2159. /* Wait reset */
  2160. if (this->wait(mtd, FL_RESETING))
  2161. return -ENXIO;
  2162. /* Restore system configuration 1 */
  2163. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  2164. /* Check manufacturer ID */
  2165. if (onenand_check_maf(bram_maf_id))
  2166. return -ENXIO;
  2167. /* Read manufacturer and device IDs from Register */
  2168. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  2169. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  2170. /* Check OneNAND device */
  2171. if (maf_id != bram_maf_id || dev_id != bram_dev_id)
  2172. return -ENXIO;
  2173. return 0;
  2174. }
  2175. /**
  2176. * onenand_probe - [OneNAND Interface] Probe the OneNAND device
  2177. * @param mtd MTD device structure
  2178. *
  2179. * OneNAND detection method:
  2180. * Compare the the values from command with ones from register
  2181. */
  2182. int onenand_probe(struct mtd_info *mtd)
  2183. {
  2184. struct onenand_chip *this = mtd->priv;
  2185. int dev_id, ver_id;
  2186. int density;
  2187. int ret;
  2188. ret = this->chip_probe(mtd);
  2189. if (ret)
  2190. return ret;
  2191. /* Read device IDs from Register */
  2192. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  2193. ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
  2194. this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
  2195. /* Flash device information */
  2196. mtd->name = onenand_print_device_info(dev_id, ver_id);
  2197. this->device_id = dev_id;
  2198. this->version_id = ver_id;
  2199. /* Check OneNAND features */
  2200. onenand_check_features(mtd);
  2201. density = onenand_get_density(dev_id);
  2202. if (FLEXONENAND(this)) {
  2203. this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
  2204. /* Maximum possible erase regions */
  2205. mtd->numeraseregions = this->dies << 1;
  2206. mtd->eraseregions = malloc(sizeof(struct mtd_erase_region_info)
  2207. * (this->dies << 1));
  2208. if (!mtd->eraseregions)
  2209. return -ENOMEM;
  2210. }
  2211. /*
  2212. * For Flex-OneNAND, chipsize represents maximum possible device size.
  2213. * mtd->size represents the actual device size.
  2214. */
  2215. this->chipsize = (16 << density) << 20;
  2216. /* OneNAND page size & block size */
  2217. /* The data buffer size is equal to page size */
  2218. mtd->writesize =
  2219. this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
  2220. /* We use the full BufferRAM */
  2221. if (ONENAND_IS_4KB_PAGE(this))
  2222. mtd->writesize <<= 1;
  2223. mtd->oobsize = mtd->writesize >> 5;
  2224. /* Pagers per block is always 64 in OneNAND */
  2225. mtd->erasesize = mtd->writesize << 6;
  2226. /*
  2227. * Flex-OneNAND SLC area has 64 pages per block.
  2228. * Flex-OneNAND MLC area has 128 pages per block.
  2229. * Expose MLC erase size to find erase_shift and page_mask.
  2230. */
  2231. if (FLEXONENAND(this))
  2232. mtd->erasesize <<= 1;
  2233. this->erase_shift = ffs(mtd->erasesize) - 1;
  2234. this->page_shift = ffs(mtd->writesize) - 1;
  2235. this->ppb_shift = (this->erase_shift - this->page_shift);
  2236. this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
  2237. /* Set density mask. it is used for DDP */
  2238. if (ONENAND_IS_DDP(this))
  2239. this->density_mask = this->chipsize >> (this->erase_shift + 1);
  2240. /* It's real page size */
  2241. this->writesize = mtd->writesize;
  2242. /* REVIST: Multichip handling */
  2243. if (FLEXONENAND(this))
  2244. flexonenand_get_size(mtd);
  2245. else
  2246. mtd->size = this->chipsize;
  2247. mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH;
  2248. mtd->flags = MTD_CAP_NANDFLASH;
  2249. mtd->_erase = onenand_erase;
  2250. mtd->_read_oob = onenand_read_oob;
  2251. mtd->_write_oob = onenand_write_oob;
  2252. mtd->_sync = onenand_sync;
  2253. mtd->_block_isbad = onenand_block_isbad;
  2254. mtd->_block_markbad = onenand_block_markbad;
  2255. mtd->writebufsize = mtd->writesize;
  2256. return 0;
  2257. }
  2258. /**
  2259. * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
  2260. * @param mtd MTD device structure
  2261. * @param maxchips Number of chips to scan for
  2262. *
  2263. * This fills out all the not initialized function pointers
  2264. * with the defaults.
  2265. * The flash ID is read and the mtd/chip structures are
  2266. * filled with the appropriate values.
  2267. */
  2268. int onenand_scan(struct mtd_info *mtd, int maxchips)
  2269. {
  2270. int i;
  2271. struct onenand_chip *this = mtd->priv;
  2272. if (!this->read_word)
  2273. this->read_word = onenand_readw;
  2274. if (!this->write_word)
  2275. this->write_word = onenand_writew;
  2276. if (!this->command)
  2277. this->command = onenand_command;
  2278. if (!this->wait)
  2279. this->wait = onenand_wait;
  2280. if (!this->bbt_wait)
  2281. this->bbt_wait = onenand_bbt_wait;
  2282. if (!this->read_bufferram)
  2283. this->read_bufferram = onenand_read_bufferram;
  2284. if (!this->write_bufferram)
  2285. this->write_bufferram = onenand_write_bufferram;
  2286. if (!this->chip_probe)
  2287. this->chip_probe = onenand_chip_probe;
  2288. if (!this->block_markbad)
  2289. this->block_markbad = onenand_default_block_markbad;
  2290. if (!this->scan_bbt)
  2291. this->scan_bbt = onenand_default_bbt;
  2292. if (onenand_probe(mtd))
  2293. return -ENXIO;
  2294. /* Set Sync. Burst Read after probing */
  2295. if (this->mmcontrol) {
  2296. printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
  2297. this->read_bufferram = onenand_sync_read_bufferram;
  2298. }
  2299. /* Allocate buffers, if necessary */
  2300. if (!this->page_buf) {
  2301. this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
  2302. if (!this->page_buf) {
  2303. printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
  2304. return -ENOMEM;
  2305. }
  2306. this->options |= ONENAND_PAGEBUF_ALLOC;
  2307. }
  2308. if (!this->oob_buf) {
  2309. this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
  2310. if (!this->oob_buf) {
  2311. printk(KERN_ERR "onenand_scan: Can't allocate oob_buf\n");
  2312. if (this->options & ONENAND_PAGEBUF_ALLOC) {
  2313. this->options &= ~ONENAND_PAGEBUF_ALLOC;
  2314. kfree(this->page_buf);
  2315. }
  2316. return -ENOMEM;
  2317. }
  2318. this->options |= ONENAND_OOBBUF_ALLOC;
  2319. }
  2320. this->state = FL_READY;
  2321. /*
  2322. * Allow subpage writes up to oobsize.
  2323. */
  2324. switch (mtd->oobsize) {
  2325. case 128:
  2326. this->ecclayout = &onenand_oob_128;
  2327. mtd->subpage_sft = 0;
  2328. break;
  2329. case 64:
  2330. this->ecclayout = &onenand_oob_64;
  2331. mtd->subpage_sft = 2;
  2332. break;
  2333. case 32:
  2334. this->ecclayout = &onenand_oob_32;
  2335. mtd->subpage_sft = 1;
  2336. break;
  2337. default:
  2338. printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
  2339. mtd->oobsize);
  2340. mtd->subpage_sft = 0;
  2341. /* To prevent kernel oops */
  2342. this->ecclayout = &onenand_oob_32;
  2343. break;
  2344. }
  2345. this->subpagesize = mtd->writesize >> mtd->subpage_sft;
  2346. /*
  2347. * The number of bytes available for a client to place data into
  2348. * the out of band area
  2349. */
  2350. this->ecclayout->oobavail = 0;
  2351. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE &&
  2352. this->ecclayout->oobfree[i].length; i++)
  2353. this->ecclayout->oobavail +=
  2354. this->ecclayout->oobfree[i].length;
  2355. mtd->oobavail = this->ecclayout->oobavail;
  2356. mtd->ecclayout = this->ecclayout;
  2357. /* Unlock whole block */
  2358. onenand_unlock_all(mtd);
  2359. return this->scan_bbt(mtd);
  2360. }
  2361. /**
  2362. * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
  2363. * @param mtd MTD device structure
  2364. */
  2365. void onenand_release(struct mtd_info *mtd)
  2366. {
  2367. }