ali512x.c 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002
  4. * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
  5. */
  6. /*
  7. * Based on sc520cdp.c from rolo 1.6:
  8. *----------------------------------------------------------------------
  9. * (C) Copyright 2000
  10. * Sysgo Real-Time Solutions GmbH
  11. * Klein-Winternheim, Germany
  12. *----------------------------------------------------------------------
  13. */
  14. #include <config.h>
  15. #include <common.h>
  16. #include <asm/io.h>
  17. #include <ali512x.h>
  18. /* ALI M5123 Logical device numbers:
  19. * 0 FDC
  20. * 1 unused?
  21. * 2 unused?
  22. * 3 lpt
  23. * 4 UART1
  24. * 5 UART2
  25. * 6 RTC
  26. * 7 mouse/kbd
  27. * 8 CIO
  28. */
  29. /*
  30. ************************************************************
  31. * Some access primitives for the ALi chip: *
  32. ************************************************************
  33. */
  34. static void ali_write(u8 index, u8 value)
  35. {
  36. /* write an arbirary register */
  37. outb(index, ALI_INDEX);
  38. outb(value, ALI_DATA);
  39. }
  40. #if 0
  41. static int ali_read(u8 index)
  42. {
  43. outb(index, ALI_INDEX);
  44. return inb(ALI_DATA);
  45. }
  46. #endif
  47. #define ALI_OPEN() \
  48. outb(0x51, ALI_INDEX); \
  49. outb(0x23, ALI_INDEX)
  50. #define ALI_CLOSE() \
  51. outb(0xbb, ALI_INDEX)
  52. /* Select a logical device */
  53. #define ALI_SELDEV(dev) \
  54. ali_write(0x07, dev)
  55. void ali512x_init(void)
  56. {
  57. ALI_OPEN();
  58. ali_write(0x02, 0x01); /* soft reset */
  59. ali_write(0x03, 0x03); /* disable access to CIOs */
  60. ali_write(0x22, 0x00); /* disable direct powerdown */
  61. ali_write(0x23, 0x00); /* disable auto powerdown */
  62. ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */
  63. ALI_CLOSE();
  64. }
  65. void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel)
  66. {
  67. ALI_OPEN();
  68. ALI_SELDEV(0);
  69. ali_write(0x30, enabled?1:0);
  70. if (enabled) {
  71. ali_write(0x60, io >> 8);
  72. ali_write(0x61, io & 0xff);
  73. ali_write(0x70, irq);
  74. ali_write(0x74, dma_channel);
  75. /* AT mode, no drive swap */
  76. ali_write(0xf0, 0x08);
  77. ali_write(0xf1, 0x00);
  78. ali_write(0xf2, 0xff);
  79. ali_write(0xf4, 0x00);
  80. }
  81. ALI_CLOSE();
  82. }
  83. void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel)
  84. {
  85. ALI_OPEN();
  86. ALI_SELDEV(3);
  87. ali_write(0x30, enabled?1:0);
  88. if (enabled) {
  89. ali_write(0x60, io >> 8);
  90. ali_write(0x61, io & 0xff);
  91. ali_write(0x70, irq);
  92. ali_write(0x74, dma_channel);
  93. /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */
  94. ali_write(0xf0, 0xbc);
  95. /* 12 MHz, Burst DMA in ECP */
  96. ali_write(0xf1, 0x05);
  97. }
  98. ALI_CLOSE();
  99. }
  100. void ali512x_set_uart(int enabled, int index, u16 io, u8 irq)
  101. {
  102. ALI_OPEN();
  103. ALI_SELDEV(index?5:4);
  104. ali_write(0x30, enabled?1:0);
  105. if (enabled) {
  106. ali_write(0x60, io >> 8);
  107. ali_write(0x61, io & 0xff);
  108. ali_write(0x70, irq);
  109. ali_write(0xf0, 0x00);
  110. ali_write(0xf1, 0x00);
  111. /* huh? write 0xf2 twice - a typo in rolo
  112. * or some secret ali errata? Who knows?
  113. */
  114. if (index) {
  115. ali_write(0xf2, 0x00);
  116. }
  117. ali_write(0xf2, 0x0c);
  118. }
  119. ALI_CLOSE();
  120. }
  121. void ali512x_set_uart2_irda(int enabled)
  122. {
  123. ALI_OPEN();
  124. ALI_SELDEV(5);
  125. ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */
  126. ALI_CLOSE();
  127. }
  128. void ali512x_set_rtc(int enabled, u16 io, u8 irq)
  129. {
  130. ALI_OPEN();
  131. ALI_SELDEV(6);
  132. ali_write(0x30, enabled?1:0);
  133. if (enabled) {
  134. ali_write(0x60, io >> 8);
  135. ali_write(0x61, io & 0xff);
  136. ali_write(0x70, irq);
  137. ali_write(0xf0, 0x00);
  138. }
  139. ALI_CLOSE();
  140. }
  141. void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq)
  142. {
  143. ALI_OPEN();
  144. ALI_SELDEV(7);
  145. ali_write(0x30, enabled?1:0);
  146. if (enabled) {
  147. ali_write(0x70, kbc_irq);
  148. ali_write(0x72, mouse_irq);
  149. ali_write(0xf0, 0x00);
  150. }
  151. ALI_CLOSE();
  152. }
  153. /* Common I/O
  154. *
  155. * (This descripotsion is base on several incompete sources
  156. * since I have not been able to obtain any datasheet for the device
  157. * there may be some mis-understandings burried in here.
  158. * -- Daniel daniel@omicron.se)
  159. *
  160. * There are 22 CIO pins numbered
  161. * 10-17
  162. * 20-25
  163. * 30-37
  164. *
  165. * 20-24 are dedicated CIO pins, the other 17 are muliplexed with
  166. * other functions.
  167. *
  168. * Secondary
  169. * CIO Pin Function Decription
  170. * =======================================================
  171. * CIO10 IRQIN1 Interrupt input 1?
  172. * CIO11 IRQIN2 Interrupt input 2?
  173. * CIO12 IRRX IrDa Receive
  174. * CIO13 IRTX IrDa Transmit
  175. * CIO14 P21 KBC P21 fucntion
  176. * CIO15 P20 KBC P21 fucntion
  177. * CIO16 I2C_CLK I2C Clock
  178. * CIO17 I2C_DAT I2C Data
  179. *
  180. * CIO20 -
  181. * CIO21 -
  182. * CIO22 -
  183. * CIO23 -
  184. * CIO24 -
  185. * CIO25 LOCK Keylock
  186. *
  187. * CIO30 KBC_CLK Keybaord Clock
  188. * CIO31 CS0J General Chip Select decoder CS0J
  189. * CIO32 CS1J General Chip Select decoder CS1J
  190. * CIO33 ALT_KCLK Alternative Keyboard Clock
  191. * CIO34 ALT_KDAT Alternative Keyboard Data
  192. * CIO35 ALT_MCLK Alternative Mouse Clock
  193. * CIO36 ALT_MDAT Alternative Mouse Data
  194. * CIO37 ALT_KBC Alternative KBC select
  195. *
  196. * The CIO use an indirect address scheme.
  197. *
  198. * Reigster 3 in the SIO is used to select the index and data
  199. * port addresses where the CIO I/O registers show up.
  200. * The function selection registers are accessible under
  201. * function SIO 8.
  202. *
  203. * SIO reigster 3 (CIO Address Selection) bit definitions:
  204. * bit 7 CIO index and data registers enabled
  205. * bit 1-0 CIO indirect registers port address select
  206. * 0 index = 0xE0 data = 0xE1
  207. * 1 index = 0xE2 data = 0xE3
  208. * 2 index = 0xE4 data = 0xE5
  209. * 3 index = 0xEA data = 0xEB
  210. *
  211. * There are three CIO I/O register accessed via CIO index port and CIO data port
  212. * 0x01 CIO 10-17 data
  213. * 0x02 CIO 20-25 data (bits 7-6 unused)
  214. * 0x03 CIO 30-37 data
  215. *
  216. *
  217. * The pin function is accessed through normal
  218. * SIO registers, each register have the same format:
  219. *
  220. * Bit Function Value
  221. * 0 Input/output 1=input
  222. * 1 Polarity of signal 1=inverted
  223. * 2 Unused ??
  224. * 3 Function (normal or special) 1=special
  225. * 7-4 Unused
  226. *
  227. * SIO REG
  228. * 0xe0 CIO 10 Config
  229. * 0xe1 CIO 11 Config
  230. * 0xe2 CIO 12 Config
  231. * 0xe3 CIO 13 Config
  232. * 0xe4 CIO 14 Config
  233. * 0xe5 CIO 15 Config
  234. * 0xe6 CIO 16 Config
  235. * 0xe7 CIO 16 Config
  236. *
  237. * 0xe8 CIO 20 Config
  238. * 0xe9 CIO 21 Config
  239. * 0xea CIO 22 Config
  240. * 0xeb CIO 23 Config
  241. * 0xec CIO 24 Config
  242. * 0xed CIO 25 Config
  243. *
  244. * 0xf5 CIO 30 Config
  245. * 0xf6 CIO 31 Config
  246. * 0xf7 CIO 32 Config
  247. * 0xf8 CIO 33 Config
  248. * 0xf9 CIO 34 Config
  249. * 0xfa CIO 35 Config
  250. * 0xfb CIO 36 Config
  251. * 0xfc CIO 37 Config
  252. *
  253. */
  254. #define ALI_CIO_PORT_SEL 0x83
  255. #define ALI_CIO_INDEX 0xea
  256. #define ALI_CIO_DATA 0xeb
  257. void ali512x_set_cio(int enabled)
  258. {
  259. int i;
  260. ALI_OPEN();
  261. if (enabled) {
  262. ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */
  263. } else {
  264. ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80);
  265. }
  266. ALI_SELDEV(8);
  267. ali_write(0x30, enabled?1:0);
  268. /* set all pins to input to start with */
  269. for (i=0xe0;i<0xee;i++) {
  270. ali_write(i, 1);
  271. }
  272. for (i=0xf5;i<0xfe;i++) {
  273. ali_write(i, 1);
  274. }
  275. ALI_CLOSE();
  276. }
  277. void ali512x_cio_function(int pin, int special, int inv, int input)
  278. {
  279. u8 data;
  280. u8 addr;
  281. /* valid pins are 10-17, 20-25 and 30-37 */
  282. if (pin >= 10 && pin <= 17) {
  283. addr = 0xe0+(pin&7);
  284. } else if (pin >= 20 && pin <= 25) {
  285. addr = 0xe8+(pin&7);
  286. } else if (pin >= 30 && pin <= 37) {
  287. addr = 0xf5+(pin&7);
  288. } else {
  289. return;
  290. }
  291. ALI_OPEN();
  292. ALI_SELDEV(8);
  293. data=0xf4;
  294. if (special) {
  295. data |= 0x08;
  296. } else {
  297. if (inv) {
  298. data |= 0x02;
  299. }
  300. if (input) {
  301. data |= 0x01;
  302. }
  303. }
  304. ali_write(addr, data);
  305. ALI_CLOSE();
  306. }
  307. void ali512x_cio_out(int pin, int value)
  308. {
  309. u8 reg;
  310. u8 data;
  311. u8 bit;
  312. reg = pin/10;
  313. bit = 1 << (pin%10);
  314. outb(reg, ALI_CIO_INDEX); /* select I/O register */
  315. data = inb(ALI_CIO_DATA);
  316. if (value) {
  317. data |= bit;
  318. } else {
  319. data &= ~bit;
  320. }
  321. outb(data, ALI_CIO_DATA);
  322. }
  323. int ali512x_cio_in(int pin)
  324. {
  325. u8 reg;
  326. u8 data;
  327. u8 bit;
  328. /* valid pins are 10-17, 20-25 and 30-37 */
  329. reg = pin/10;
  330. bit = 1 << (pin%10);
  331. outb(reg, ALI_CIO_INDEX); /* select I/O register */
  332. data = inb(ALI_CIO_DATA);
  333. return data & bit;
  334. }