i2c-uclass.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2014 Google, Inc
  4. */
  5. #define LOG_CATEGORY UCLASS_I2C
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <errno.h>
  9. #include <i2c.h>
  10. #include <log.h>
  11. #include <malloc.h>
  12. #include <acpi/acpi_device.h>
  13. #include <dm/acpi.h>
  14. #include <dm/device-internal.h>
  15. #include <dm/lists.h>
  16. #include <dm/pinctrl.h>
  17. #if CONFIG_IS_ENABLED(DM_GPIO)
  18. #include <asm/gpio.h>
  19. #endif
  20. #include <linux/delay.h>
  21. #include "acpi_i2c.h"
  22. #define I2C_MAX_OFFSET_LEN 4
  23. enum {
  24. PIN_SDA = 0,
  25. PIN_SCL,
  26. PIN_COUNT,
  27. };
  28. /* Useful debugging function */
  29. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
  30. {
  31. int i;
  32. for (i = 0; i < nmsgs; i++) {
  33. struct i2c_msg *m = &msg[i];
  34. printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
  35. msg->addr, msg->len);
  36. if (!(m->flags & I2C_M_RD))
  37. printf(": %x", m->buf[0]);
  38. printf("\n");
  39. }
  40. }
  41. /**
  42. * i2c_setup_offset() - Set up a new message with a chip offset
  43. *
  44. * @chip: Chip to use
  45. * @offset: Byte offset within chip
  46. * @offset_buf: Place to put byte offset
  47. * @msg: Message buffer
  48. * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
  49. * message is still set up but will not contain an offset.
  50. */
  51. static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
  52. uint8_t offset_buf[], struct i2c_msg *msg)
  53. {
  54. int offset_len = chip->offset_len;
  55. msg->addr = chip->chip_addr;
  56. if (chip->chip_addr_offset_mask)
  57. msg->addr |= (offset >> (8 * offset_len)) &
  58. chip->chip_addr_offset_mask;
  59. msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  60. msg->len = chip->offset_len;
  61. msg->buf = offset_buf;
  62. if (!offset_len)
  63. return -EADDRNOTAVAIL;
  64. assert(offset_len <= I2C_MAX_OFFSET_LEN);
  65. while (offset_len--)
  66. *offset_buf++ = offset >> (8 * offset_len);
  67. return 0;
  68. }
  69. static int i2c_read_bytewise(struct udevice *dev, uint offset,
  70. uint8_t *buffer, int len)
  71. {
  72. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  73. struct udevice *bus = dev_get_parent(dev);
  74. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  75. struct i2c_msg msg[2], *ptr;
  76. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  77. int ret;
  78. int i;
  79. for (i = 0; i < len; i++) {
  80. if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
  81. return -EINVAL;
  82. ptr = msg + 1;
  83. ptr->addr = msg->addr;
  84. ptr->flags = msg->flags | I2C_M_RD;
  85. ptr->len = 1;
  86. ptr->buf = &buffer[i];
  87. ptr++;
  88. ret = ops->xfer(bus, msg, ptr - msg);
  89. if (ret)
  90. return ret;
  91. }
  92. return 0;
  93. }
  94. static int i2c_write_bytewise(struct udevice *dev, uint offset,
  95. const uint8_t *buffer, int len)
  96. {
  97. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  98. struct udevice *bus = dev_get_parent(dev);
  99. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  100. struct i2c_msg msg[1];
  101. uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
  102. int ret;
  103. int i;
  104. for (i = 0; i < len; i++) {
  105. if (i2c_setup_offset(chip, offset + i, buf, msg))
  106. return -EINVAL;
  107. buf[msg->len++] = buffer[i];
  108. ret = ops->xfer(bus, msg, 1);
  109. if (ret)
  110. return ret;
  111. }
  112. return 0;
  113. }
  114. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
  115. {
  116. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  117. struct udevice *bus = dev_get_parent(dev);
  118. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  119. struct i2c_msg msg[2], *ptr;
  120. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  121. int msg_count;
  122. if (!ops->xfer)
  123. return -ENOSYS;
  124. if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
  125. return i2c_read_bytewise(dev, offset, buffer, len);
  126. ptr = msg;
  127. if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
  128. ptr++;
  129. if (len) {
  130. ptr->addr = msg->addr;
  131. ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  132. ptr->flags |= I2C_M_RD;
  133. ptr->len = len;
  134. ptr->buf = buffer;
  135. ptr++;
  136. }
  137. msg_count = ptr - msg;
  138. return ops->xfer(bus, msg, msg_count);
  139. }
  140. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  141. int len)
  142. {
  143. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  144. struct udevice *bus = dev_get_parent(dev);
  145. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  146. struct i2c_msg msg[1];
  147. if (!ops->xfer)
  148. return -ENOSYS;
  149. if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
  150. return i2c_write_bytewise(dev, offset, buffer, len);
  151. /*
  152. * The simple approach would be to send two messages here: one to
  153. * set the offset and one to write the bytes. However some drivers
  154. * will not be expecting this, and some chips won't like how the
  155. * driver presents this on the I2C bus.
  156. *
  157. * The API does not support separate offset and data. We could extend
  158. * it with a flag indicating that there is data in the next message
  159. * that needs to be processed in the same transaction. We could
  160. * instead add an additional buffer to each message. For now, handle
  161. * this in the uclass since it isn't clear what the impact on drivers
  162. * would be with this extra complication. Unfortunately this means
  163. * copying the message.
  164. *
  165. * Use the stack for small messages, malloc() for larger ones. We
  166. * need to allow space for the offset (up to 4 bytes) and the message
  167. * itself.
  168. */
  169. if (len < 64) {
  170. uint8_t buf[I2C_MAX_OFFSET_LEN + len];
  171. i2c_setup_offset(chip, offset, buf, msg);
  172. msg->len += len;
  173. memcpy(buf + chip->offset_len, buffer, len);
  174. return ops->xfer(bus, msg, 1);
  175. } else {
  176. uint8_t *buf;
  177. int ret;
  178. buf = malloc(I2C_MAX_OFFSET_LEN + len);
  179. if (!buf)
  180. return -ENOMEM;
  181. i2c_setup_offset(chip, offset, buf, msg);
  182. msg->len += len;
  183. memcpy(buf + chip->offset_len, buffer, len);
  184. ret = ops->xfer(bus, msg, 1);
  185. free(buf);
  186. return ret;
  187. }
  188. }
  189. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  190. {
  191. struct udevice *bus = dev_get_parent(dev);
  192. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  193. if (!ops->xfer)
  194. return -ENOSYS;
  195. return ops->xfer(bus, msg, nmsgs);
  196. }
  197. int dm_i2c_reg_read(struct udevice *dev, uint offset)
  198. {
  199. uint8_t val;
  200. int ret;
  201. ret = dm_i2c_read(dev, offset, &val, 1);
  202. if (ret < 0)
  203. return ret;
  204. return val;
  205. }
  206. int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
  207. {
  208. uint8_t val = value;
  209. return dm_i2c_write(dev, offset, &val, 1);
  210. }
  211. int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set)
  212. {
  213. uint8_t val;
  214. int ret;
  215. ret = dm_i2c_read(dev, offset, &val, 1);
  216. if (ret < 0)
  217. return ret;
  218. val &= ~clr;
  219. val |= set;
  220. return dm_i2c_write(dev, offset, &val, 1);
  221. }
  222. /**
  223. * i2c_probe_chip() - probe for a chip on a bus
  224. *
  225. * @bus: Bus to probe
  226. * @chip_addr: Chip address to probe
  227. * @flags: Flags for the chip
  228. * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
  229. * does not respond to probe
  230. */
  231. static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
  232. enum dm_i2c_chip_flags chip_flags)
  233. {
  234. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  235. struct i2c_msg msg[1];
  236. int ret;
  237. if (ops->probe_chip) {
  238. ret = ops->probe_chip(bus, chip_addr, chip_flags);
  239. if (!ret || ret != -ENOSYS)
  240. return ret;
  241. }
  242. if (!ops->xfer)
  243. return -ENOSYS;
  244. /* Probe with a zero-length message */
  245. msg->addr = chip_addr;
  246. msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  247. msg->len = 0;
  248. msg->buf = NULL;
  249. return ops->xfer(bus, msg, 1);
  250. }
  251. static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,
  252. struct udevice **devp)
  253. {
  254. struct dm_i2c_chip *chip;
  255. char name[30], *str;
  256. struct udevice *dev;
  257. int ret;
  258. snprintf(name, sizeof(name), "generic_%x", chip_addr);
  259. str = strdup(name);
  260. if (!str)
  261. return -ENOMEM;
  262. ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
  263. debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
  264. if (ret)
  265. goto err_bind;
  266. /* Tell the device what we know about it */
  267. chip = dev_get_parent_plat(dev);
  268. chip->chip_addr = chip_addr;
  269. chip->offset_len = offset_len;
  270. ret = device_probe(dev);
  271. debug("%s: device_probe: ret=%d\n", __func__, ret);
  272. if (ret)
  273. goto err_probe;
  274. *devp = dev;
  275. return 0;
  276. err_probe:
  277. /*
  278. * If the device failed to probe, unbind it. There is nothing there
  279. * on the bus so we don't want to leave it lying around
  280. */
  281. device_unbind(dev);
  282. err_bind:
  283. free(str);
  284. return ret;
  285. }
  286. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  287. struct udevice **devp)
  288. {
  289. struct udevice *dev;
  290. debug("%s: Searching bus '%s' for address %02x: ", __func__,
  291. bus->name, chip_addr);
  292. for (device_find_first_child(bus, &dev); dev;
  293. device_find_next_child(&dev)) {
  294. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  295. int ret;
  296. if (chip->chip_addr == (chip_addr &
  297. ~chip->chip_addr_offset_mask)) {
  298. ret = device_probe(dev);
  299. debug("found, ret=%d\n", ret);
  300. if (ret)
  301. return ret;
  302. *devp = dev;
  303. return 0;
  304. }
  305. }
  306. debug("not found\n");
  307. return i2c_bind_driver(bus, chip_addr, offset_len, devp);
  308. }
  309. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  310. struct udevice **devp)
  311. {
  312. struct udevice *bus;
  313. int ret;
  314. ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
  315. if (ret) {
  316. debug("Cannot find I2C bus %d\n", busnum);
  317. return ret;
  318. }
  319. /* detect the presence of the chip on the bus */
  320. ret = i2c_probe_chip(bus, chip_addr, 0);
  321. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  322. chip_addr, ret);
  323. if (ret) {
  324. debug("Cannot detect I2C chip %02x on bus %d\n", chip_addr,
  325. busnum);
  326. return ret;
  327. }
  328. ret = i2c_get_chip(bus, chip_addr, offset_len, devp);
  329. if (ret) {
  330. debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
  331. busnum);
  332. return ret;
  333. }
  334. return 0;
  335. }
  336. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  337. struct udevice **devp)
  338. {
  339. int ret;
  340. *devp = NULL;
  341. /* First probe that chip */
  342. ret = i2c_probe_chip(bus, chip_addr, chip_flags);
  343. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  344. chip_addr, ret);
  345. if (ret)
  346. return ret;
  347. /* The chip was found, see if we have a driver, and probe it */
  348. ret = i2c_get_chip(bus, chip_addr, 1, devp);
  349. debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
  350. return ret;
  351. }
  352. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  353. {
  354. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  355. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  356. int ret;
  357. /*
  358. * If we have a method, call it. If not then the driver probably wants
  359. * to deal with speed changes on the next transfer. It can easily read
  360. * the current speed from this uclass
  361. */
  362. if (ops->set_bus_speed) {
  363. ret = ops->set_bus_speed(bus, speed);
  364. if (ret)
  365. return ret;
  366. }
  367. i2c->speed_hz = speed;
  368. return 0;
  369. }
  370. int dm_i2c_get_bus_speed(struct udevice *bus)
  371. {
  372. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  373. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  374. if (!ops->get_bus_speed)
  375. return i2c->speed_hz;
  376. return ops->get_bus_speed(bus);
  377. }
  378. int i2c_set_chip_flags(struct udevice *dev, uint flags)
  379. {
  380. struct udevice *bus = dev->parent;
  381. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  382. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  383. int ret;
  384. if (ops->set_flags) {
  385. ret = ops->set_flags(dev, flags);
  386. if (ret)
  387. return ret;
  388. }
  389. chip->flags = flags;
  390. return 0;
  391. }
  392. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
  393. {
  394. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  395. *flagsp = chip->flags;
  396. return 0;
  397. }
  398. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
  399. {
  400. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  401. if (offset_len > I2C_MAX_OFFSET_LEN)
  402. return log_ret(-EINVAL);
  403. chip->offset_len = offset_len;
  404. return 0;
  405. }
  406. int i2c_get_chip_offset_len(struct udevice *dev)
  407. {
  408. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  409. return chip->offset_len;
  410. }
  411. int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask)
  412. {
  413. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  414. chip->chip_addr_offset_mask = mask;
  415. return 0;
  416. }
  417. uint i2c_get_chip_addr_offset_mask(struct udevice *dev)
  418. {
  419. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  420. return chip->chip_addr_offset_mask;
  421. }
  422. #if CONFIG_IS_ENABLED(DM_GPIO)
  423. static void i2c_gpio_set_pin(struct gpio_desc *pin, int bit)
  424. {
  425. if (bit)
  426. dm_gpio_set_dir_flags(pin, GPIOD_IS_IN);
  427. else
  428. dm_gpio_set_dir_flags(pin, GPIOD_IS_OUT |
  429. GPIOD_ACTIVE_LOW |
  430. GPIOD_IS_OUT_ACTIVE);
  431. }
  432. static int i2c_gpio_get_pin(struct gpio_desc *pin)
  433. {
  434. return dm_gpio_get_value(pin);
  435. }
  436. int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
  437. struct gpio_desc *scl_pin,
  438. unsigned int scl_count,
  439. unsigned int start_count,
  440. unsigned int delay)
  441. {
  442. int i, ret = -EREMOTEIO;
  443. i2c_gpio_set_pin(sda_pin, 1);
  444. i2c_gpio_set_pin(scl_pin, 1);
  445. udelay(delay);
  446. /* Toggle SCL until slave release SDA */
  447. for (; scl_count; --scl_count) {
  448. i2c_gpio_set_pin(scl_pin, 1);
  449. udelay(delay);
  450. i2c_gpio_set_pin(scl_pin, 0);
  451. udelay(delay);
  452. if (i2c_gpio_get_pin(sda_pin)) {
  453. ret = 0;
  454. break;
  455. }
  456. }
  457. if (!ret && start_count) {
  458. for (i = 0; i < start_count; i++) {
  459. /* Send start condition */
  460. udelay(delay);
  461. i2c_gpio_set_pin(sda_pin, 1);
  462. udelay(delay);
  463. i2c_gpio_set_pin(scl_pin, 1);
  464. udelay(delay);
  465. i2c_gpio_set_pin(sda_pin, 0);
  466. udelay(delay);
  467. i2c_gpio_set_pin(scl_pin, 0);
  468. }
  469. }
  470. /* Then, send I2C stop */
  471. i2c_gpio_set_pin(sda_pin, 0);
  472. udelay(delay);
  473. i2c_gpio_set_pin(scl_pin, 1);
  474. udelay(delay);
  475. i2c_gpio_set_pin(sda_pin, 1);
  476. udelay(delay);
  477. if (!i2c_gpio_get_pin(sda_pin) || !i2c_gpio_get_pin(scl_pin))
  478. ret = -EREMOTEIO;
  479. return ret;
  480. }
  481. static int i2c_deblock_gpio(struct udevice *bus)
  482. {
  483. struct gpio_desc gpios[PIN_COUNT];
  484. int ret, ret0;
  485. ret = gpio_request_list_by_name(bus, "gpios", gpios,
  486. ARRAY_SIZE(gpios), GPIOD_IS_IN);
  487. if (ret != ARRAY_SIZE(gpios)) {
  488. debug("%s: I2C Node '%s' has no 'gpios' property %s\n",
  489. __func__, dev_read_name(bus), bus->name);
  490. if (ret >= 0) {
  491. gpio_free_list(bus, gpios, ret);
  492. ret = -ENOENT;
  493. }
  494. goto out;
  495. }
  496. ret = pinctrl_select_state(bus, "gpio");
  497. if (ret) {
  498. debug("%s: I2C Node '%s' has no 'gpio' pinctrl state. %s\n",
  499. __func__, dev_read_name(bus), bus->name);
  500. goto out_no_pinctrl;
  501. }
  502. ret0 = i2c_deblock_gpio_loop(&gpios[PIN_SDA], &gpios[PIN_SCL], 9, 0, 5);
  503. ret = pinctrl_select_state(bus, "default");
  504. if (ret) {
  505. debug("%s: I2C Node '%s' has no 'default' pinctrl state. %s\n",
  506. __func__, dev_read_name(bus), bus->name);
  507. }
  508. ret = !ret ? ret0 : ret;
  509. out_no_pinctrl:
  510. gpio_free_list(bus, gpios, ARRAY_SIZE(gpios));
  511. out:
  512. return ret;
  513. }
  514. #else
  515. static int i2c_deblock_gpio(struct udevice *bus)
  516. {
  517. return -ENOSYS;
  518. }
  519. #endif /* DM_GPIO */
  520. int i2c_deblock(struct udevice *bus)
  521. {
  522. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  523. if (!ops->deblock)
  524. return i2c_deblock_gpio(bus);
  525. return ops->deblock(bus);
  526. }
  527. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  528. int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip)
  529. {
  530. int addr;
  531. chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len",
  532. 1);
  533. chip->flags = 0;
  534. addr = dev_read_u32_default(dev, "reg", -1);
  535. if (addr == -1) {
  536. debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
  537. dev_read_name(dev), dev->name);
  538. return log_ret(-EINVAL);
  539. }
  540. chip->chip_addr = addr;
  541. return 0;
  542. }
  543. #endif
  544. static int i2c_pre_probe(struct udevice *dev)
  545. {
  546. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  547. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  548. unsigned int max = 0;
  549. ofnode node;
  550. int ret;
  551. i2c->max_transaction_bytes = 0;
  552. dev_for_each_subnode(node, dev) {
  553. ret = ofnode_read_u32(node,
  554. "u-boot,i2c-transaction-bytes",
  555. &max);
  556. if (!ret && max > i2c->max_transaction_bytes)
  557. i2c->max_transaction_bytes = max;
  558. }
  559. debug("%s: I2C bus: %s max transaction bytes: %d\n", __func__,
  560. dev->name, i2c->max_transaction_bytes);
  561. #endif
  562. return 0;
  563. }
  564. static int i2c_post_probe(struct udevice *dev)
  565. {
  566. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  567. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  568. i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency",
  569. I2C_SPEED_STANDARD_RATE);
  570. return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
  571. #else
  572. return 0;
  573. #endif
  574. }
  575. static int i2c_child_post_bind(struct udevice *dev)
  576. {
  577. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  578. struct dm_i2c_chip *plat = dev_get_parent_plat(dev);
  579. if (!dev_has_ofnode(dev))
  580. return 0;
  581. return i2c_chip_of_to_plat(dev, plat);
  582. #else
  583. return 0;
  584. #endif
  585. }
  586. static int i2c_post_bind(struct udevice *dev)
  587. {
  588. int ret = 0;
  589. debug("%s: %s, seq=%d\n", __func__, dev->name, dev_seq(dev));
  590. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  591. ret = dm_scan_fdt_dev(dev);
  592. #endif
  593. return ret;
  594. }
  595. UCLASS_DRIVER(i2c) = {
  596. .id = UCLASS_I2C,
  597. .name = "i2c",
  598. .flags = DM_UC_FLAG_SEQ_ALIAS,
  599. .post_bind = i2c_post_bind,
  600. .pre_probe = i2c_pre_probe,
  601. .post_probe = i2c_post_probe,
  602. .per_device_auto = sizeof(struct dm_i2c_bus),
  603. .per_child_plat_auto = sizeof(struct dm_i2c_chip),
  604. .child_post_bind = i2c_child_post_bind,
  605. };
  606. UCLASS_DRIVER(i2c_generic) = {
  607. .id = UCLASS_I2C_GENERIC,
  608. .name = "i2c_generic",
  609. };
  610. static const struct udevice_id generic_chip_i2c_ids[] = {
  611. { .compatible = "i2c-chip", .data = I2C_DEVICE_GENERIC },
  612. #if CONFIG_IS_ENABLED(ACPIGEN)
  613. { .compatible = "hid-over-i2c", .data = I2C_DEVICE_HID_OVER_I2C },
  614. #endif
  615. { }
  616. };
  617. U_BOOT_DRIVER(i2c_generic_chip_drv) = {
  618. .name = "i2c_generic_chip_drv",
  619. .id = UCLASS_I2C_GENERIC,
  620. .of_match = generic_chip_i2c_ids,
  621. #if CONFIG_IS_ENABLED(ACPIGEN)
  622. .of_to_plat = acpi_i2c_of_to_plat,
  623. .priv_auto = sizeof(struct acpi_i2c_priv),
  624. #endif
  625. ACPI_OPS_PTR(&acpi_i2c_ops)
  626. };