ast_i2c.c 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2012-2020 ASPEED Technology Inc.
  4. * Copyright 2016 IBM Corporation
  5. * Copyright 2017 Google, Inc.
  6. */
  7. #include <common.h>
  8. #include <clk.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <fdtdec.h>
  12. #include <i2c.h>
  13. #include <log.h>
  14. #include <asm/io.h>
  15. #include <asm/arch/scu_ast2500.h>
  16. #include <linux/delay.h>
  17. #include <linux/err.h>
  18. #include "ast_i2c.h"
  19. #define I2C_TIMEOUT_US 100000
  20. #define I2C_SLEEP_STEP_US 20
  21. #define HIGHSPEED_TTIMEOUT 3
  22. /*
  23. * Device private data
  24. */
  25. struct ast_i2c_priv {
  26. /* This device's clock */
  27. struct clk clk;
  28. /* Device registers */
  29. struct ast_i2c_regs *regs;
  30. /* I2C speed in Hz */
  31. int speed;
  32. };
  33. /*
  34. * Given desired divider ratio, return the value that needs to be set
  35. * in Clock and AC Timing Control register
  36. */
  37. static u32 get_clk_reg_val(ulong divider_ratio)
  38. {
  39. ulong inc = 0, div;
  40. ulong scl_low, scl_high, data;
  41. for (div = 0; divider_ratio >= 16; div++) {
  42. inc |= (divider_ratio & 1);
  43. divider_ratio >>= 1;
  44. }
  45. divider_ratio += inc;
  46. scl_low = (divider_ratio >> 1) - 1;
  47. scl_high = divider_ratio - scl_low - 2;
  48. data = I2CD_CACTC_BASE
  49. | (scl_high << I2CD_TCKHIGH_SHIFT)
  50. | (scl_low << I2CD_TCKLOW_SHIFT)
  51. | (div << I2CD_BASE_DIV_SHIFT);
  52. return data;
  53. }
  54. static void ast_i2c_clear_interrupts(struct udevice *dev)
  55. {
  56. struct ast_i2c_priv *priv = dev_get_priv(dev);
  57. writel(~0, &priv->regs->isr);
  58. }
  59. static void ast_i2c_init_bus(struct udevice *dev)
  60. {
  61. struct ast_i2c_priv *priv = dev_get_priv(dev);
  62. /* Reset device */
  63. writel(0, &priv->regs->fcr);
  64. /* Enable Master Mode. Assuming single-master */
  65. writel(I2CD_MASTER_EN
  66. | I2CD_M_SDA_LOCK_EN
  67. | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN,
  68. &priv->regs->fcr);
  69. /* Enable Interrupts */
  70. writel(I2CD_INTR_TX_ACK
  71. | I2CD_INTR_TX_NAK
  72. | I2CD_INTR_RX_DONE
  73. | I2CD_INTR_BUS_RECOVER_DONE
  74. | I2CD_INTR_NORMAL_STOP
  75. | I2CD_INTR_ABNORMAL, &priv->regs->icr);
  76. }
  77. static int ast_i2c_of_to_plat(struct udevice *dev)
  78. {
  79. struct ast_i2c_priv *priv = dev_get_priv(dev);
  80. int ret;
  81. priv->regs = dev_read_addr_ptr(dev);
  82. if (!priv->regs)
  83. return -EINVAL;
  84. ret = clk_get_by_index(dev, 0, &priv->clk);
  85. if (ret < 0) {
  86. debug("%s: Can't get clock for %s: %d\n", __func__, dev->name,
  87. ret);
  88. return ret;
  89. }
  90. return 0;
  91. }
  92. static int ast_i2c_probe(struct udevice *dev)
  93. {
  94. struct ast2500_scu *scu;
  95. debug("Enabling I2C%u\n", dev_seq(dev));
  96. /*
  97. * Get all I2C devices out of Reset.
  98. * Only needs to be done once, but doing it for every
  99. * device does not hurt.
  100. */
  101. scu = ast_get_scu();
  102. ast_scu_unlock(scu);
  103. clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C);
  104. ast_scu_lock(scu);
  105. ast_i2c_init_bus(dev);
  106. return 0;
  107. }
  108. static int ast_i2c_wait_isr(struct udevice *dev, u32 flag)
  109. {
  110. struct ast_i2c_priv *priv = dev_get_priv(dev);
  111. int timeout = I2C_TIMEOUT_US;
  112. while (!(readl(&priv->regs->isr) & flag) && timeout > 0) {
  113. udelay(I2C_SLEEP_STEP_US);
  114. timeout -= I2C_SLEEP_STEP_US;
  115. }
  116. ast_i2c_clear_interrupts(dev);
  117. if (timeout <= 0)
  118. return -ETIMEDOUT;
  119. return 0;
  120. }
  121. static int ast_i2c_send_stop(struct udevice *dev)
  122. {
  123. struct ast_i2c_priv *priv = dev_get_priv(dev);
  124. writel(I2CD_M_STOP_CMD, &priv->regs->csr);
  125. return ast_i2c_wait_isr(dev, I2CD_INTR_NORMAL_STOP);
  126. }
  127. static int ast_i2c_wait_tx(struct udevice *dev)
  128. {
  129. struct ast_i2c_priv *priv = dev_get_priv(dev);
  130. int timeout = I2C_TIMEOUT_US;
  131. u32 flag = I2CD_INTR_TX_ACK | I2CD_INTR_TX_NAK;
  132. u32 status = readl(&priv->regs->isr) & flag;
  133. int ret = 0;
  134. while (!status && timeout > 0) {
  135. status = readl(&priv->regs->isr) & flag;
  136. udelay(I2C_SLEEP_STEP_US);
  137. timeout -= I2C_SLEEP_STEP_US;
  138. }
  139. if (status == I2CD_INTR_TX_NAK)
  140. ret = -EREMOTEIO;
  141. if (timeout <= 0)
  142. ret = -ETIMEDOUT;
  143. ast_i2c_clear_interrupts(dev);
  144. return ret;
  145. }
  146. static int ast_i2c_start_txn(struct udevice *dev, uint devaddr)
  147. {
  148. struct ast_i2c_priv *priv = dev_get_priv(dev);
  149. /* Start and Send Device Address */
  150. writel(devaddr, &priv->regs->trbbr);
  151. writel(I2CD_M_START_CMD | I2CD_M_TX_CMD, &priv->regs->csr);
  152. return ast_i2c_wait_tx(dev);
  153. }
  154. static int ast_i2c_read_data(struct udevice *dev, u8 chip_addr, u8 *buffer,
  155. size_t len, bool send_stop)
  156. {
  157. struct ast_i2c_priv *priv = dev_get_priv(dev);
  158. u32 i2c_cmd = I2CD_M_RX_CMD;
  159. int ret;
  160. ret = ast_i2c_start_txn(dev, (chip_addr << 1) | I2C_M_RD);
  161. if (ret < 0)
  162. return ret;
  163. for (; len > 0; len--, buffer++) {
  164. if (len == 1)
  165. i2c_cmd |= I2CD_M_S_RX_CMD_LAST;
  166. writel(i2c_cmd, &priv->regs->csr);
  167. ret = ast_i2c_wait_isr(dev, I2CD_INTR_RX_DONE);
  168. if (ret < 0)
  169. return ret;
  170. *buffer = (readl(&priv->regs->trbbr) & I2CD_RX_DATA_MASK)
  171. >> I2CD_RX_DATA_SHIFT;
  172. }
  173. ast_i2c_clear_interrupts(dev);
  174. if (send_stop)
  175. return ast_i2c_send_stop(dev);
  176. return 0;
  177. }
  178. static int ast_i2c_write_data(struct udevice *dev, u8 chip_addr, u8
  179. *buffer, size_t len, bool send_stop)
  180. {
  181. struct ast_i2c_priv *priv = dev_get_priv(dev);
  182. int ret;
  183. ret = ast_i2c_start_txn(dev, (chip_addr << 1));
  184. if (ret < 0)
  185. return ret;
  186. for (; len > 0; len--, buffer++) {
  187. writel(*buffer, &priv->regs->trbbr);
  188. writel(I2CD_M_TX_CMD, &priv->regs->csr);
  189. ret = ast_i2c_wait_tx(dev);
  190. if (ret < 0)
  191. return ret;
  192. }
  193. if (send_stop)
  194. return ast_i2c_send_stop(dev);
  195. return 0;
  196. }
  197. static int ast_i2c_deblock(struct udevice *dev)
  198. {
  199. struct ast_i2c_priv *priv = dev_get_priv(dev);
  200. struct ast_i2c_regs *regs = priv->regs;
  201. u32 csr = readl(&regs->csr);
  202. bool sda_high = csr & I2CD_SDA_LINE_STS;
  203. bool scl_high = csr & I2CD_SCL_LINE_STS;
  204. int ret = 0;
  205. if (sda_high && scl_high) {
  206. /* Bus is idle, no deblocking needed. */
  207. return 0;
  208. } else if (sda_high) {
  209. /* Send stop command */
  210. debug("Unterminated TXN in (%x), sending stop\n", csr);
  211. ret = ast_i2c_send_stop(dev);
  212. } else if (scl_high) {
  213. /* Possibly stuck slave */
  214. debug("Bus stuck (%x), attempting recovery\n", csr);
  215. writel(I2CD_BUS_RECOVER_CMD, &regs->csr);
  216. ret = ast_i2c_wait_isr(dev, I2CD_INTR_BUS_RECOVER_DONE);
  217. } else {
  218. /* Just try to reinit the device. */
  219. ast_i2c_init_bus(dev);
  220. }
  221. return ret;
  222. }
  223. static int ast_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  224. {
  225. int ret;
  226. ret = ast_i2c_deblock(dev);
  227. if (ret < 0)
  228. return ret;
  229. debug("i2c_xfer: %d messages\n", nmsgs);
  230. for (; nmsgs > 0; nmsgs--, msg++) {
  231. if (msg->flags & I2C_M_RD) {
  232. debug("i2c_read: chip=0x%x, len=0x%x, flags=0x%x\n",
  233. msg->addr, msg->len, msg->flags);
  234. ret = ast_i2c_read_data(dev, msg->addr, msg->buf,
  235. msg->len, (nmsgs == 1));
  236. } else {
  237. debug("i2c_write: chip=0x%x, len=0x%x, flags=0x%x\n",
  238. msg->addr, msg->len, msg->flags);
  239. ret = ast_i2c_write_data(dev, msg->addr, msg->buf,
  240. msg->len, (nmsgs == 1));
  241. }
  242. if (ret) {
  243. debug("%s: error (%d)\n", __func__, ret);
  244. return -EREMOTEIO;
  245. }
  246. }
  247. return 0;
  248. }
  249. static int ast_i2c_set_speed(struct udevice *dev, unsigned int speed)
  250. {
  251. struct ast_i2c_priv *priv = dev_get_priv(dev);
  252. struct ast_i2c_regs *regs = priv->regs;
  253. ulong i2c_rate, divider;
  254. debug("Setting speed for I2C%d to <%u>\n", dev_seq(dev), speed);
  255. if (!speed) {
  256. debug("No valid speed specified\n");
  257. return -EINVAL;
  258. }
  259. i2c_rate = clk_get_rate(&priv->clk);
  260. divider = i2c_rate / speed;
  261. priv->speed = speed;
  262. if (speed > I2C_SPEED_FAST_RATE) {
  263. debug("Enable High Speed\n");
  264. setbits_le32(&regs->fcr, I2CD_M_HIGH_SPEED_EN
  265. | I2CD_M_SDA_DRIVE_1T_EN
  266. | I2CD_SDA_DRIVE_1T_EN);
  267. writel(HIGHSPEED_TTIMEOUT, &regs->cactcr2);
  268. } else {
  269. debug("Enabling Normal Speed\n");
  270. writel(I2CD_NO_TIMEOUT_CTRL, &regs->cactcr2);
  271. }
  272. writel(get_clk_reg_val(divider), &regs->cactcr1);
  273. ast_i2c_clear_interrupts(dev);
  274. return 0;
  275. }
  276. static const struct dm_i2c_ops ast_i2c_ops = {
  277. .xfer = ast_i2c_xfer,
  278. .set_bus_speed = ast_i2c_set_speed,
  279. .deblock = ast_i2c_deblock,
  280. };
  281. static const struct udevice_id ast_i2c_ids[] = {
  282. { .compatible = "aspeed,ast2400-i2c-bus" },
  283. { .compatible = "aspeed,ast2500-i2c-bus" },
  284. { },
  285. };
  286. U_BOOT_DRIVER(ast_i2c) = {
  287. .name = "ast_i2c",
  288. .id = UCLASS_I2C,
  289. .of_match = ast_i2c_ids,
  290. .probe = ast_i2c_probe,
  291. .of_to_plat = ast_i2c_of_to_plat,
  292. .priv_auto = sizeof(struct ast_i2c_priv),
  293. .ops = &ast_i2c_ops,
  294. };