pcf8575_gpio.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * PCF8575 I2C GPIO EXPANDER DRIVER
  4. *
  5. * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
  6. *
  7. * Vignesh R <vigneshr@ti.com>
  8. *
  9. *
  10. * Driver for TI PCF-8575 16-bit I2C gpio expander. Based on
  11. * gpio-pcf857x Linux Kernel(v4.7) driver.
  12. *
  13. * Copyright (C) 2007 David Brownell
  14. *
  15. * Add support for 8 bit expanders - like pca8574
  16. * Copyright (C) 2021 Lukasz Majewski - DENX Software Engineering
  17. *
  18. */
  19. #include <common.h>
  20. #include <dm.h>
  21. #include <i2c.h>
  22. #include <log.h>
  23. #include <asm-generic/gpio.h>
  24. #include <asm/global_data.h>
  25. #include <linux/bitops.h>
  26. DECLARE_GLOBAL_DATA_PTR;
  27. struct pcf8575_chip {
  28. /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
  29. * We can't actually know whether a pin is configured (a) as output
  30. * and driving the signal low, or (b) as input and reporting a low
  31. * value ... without knowing the last value written since the chip
  32. * came out of reset (if any). We can't read the latched output.
  33. * In short, the only reliable solution for setting up pin direction
  34. * is to do it explicitly.
  35. *
  36. * Using "out" avoids that trouble. When left initialized to zero,
  37. * our software copy of the "latch" then matches the chip's all-ones
  38. * reset state. Otherwise it flags pins to be driven low.
  39. */
  40. unsigned int out; /* software latch */
  41. };
  42. /* Read/Write to I/O expander */
  43. static int pcf8575_i2c_write(struct udevice *dev, unsigned int word)
  44. {
  45. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  46. u8 buf[2] = { word & 0xff, word >> 8, };
  47. int ret;
  48. ret = dm_i2c_write(dev, 0, buf, dev_get_driver_data(dev));
  49. if (ret)
  50. printf("%s i2c write failed to addr %x\n", __func__,
  51. chip->chip_addr);
  52. return ret;
  53. }
  54. static int pcf8575_i2c_read(struct udevice *dev)
  55. {
  56. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  57. u8 buf[2] = {0x00, 0x00};
  58. int ret;
  59. ret = dm_i2c_read(dev, 0, buf, dev_get_driver_data(dev));
  60. if (ret) {
  61. printf("%s i2c read failed from addr %x\n", __func__,
  62. chip->chip_addr);
  63. return ret;
  64. }
  65. return (buf[1] << 8) | buf[0];
  66. }
  67. static int pcf8575_direction_input(struct udevice *dev, unsigned offset)
  68. {
  69. struct pcf8575_chip *plat = dev_get_plat(dev);
  70. int status;
  71. plat->out |= BIT(offset);
  72. status = pcf8575_i2c_write(dev, plat->out);
  73. return status;
  74. }
  75. static int pcf8575_direction_output(struct udevice *dev,
  76. unsigned int offset, int value)
  77. {
  78. struct pcf8575_chip *plat = dev_get_plat(dev);
  79. int ret;
  80. if (value)
  81. plat->out |= BIT(offset);
  82. else
  83. plat->out &= ~BIT(offset);
  84. ret = pcf8575_i2c_write(dev, plat->out);
  85. return ret;
  86. }
  87. static int pcf8575_get_value(struct udevice *dev, unsigned int offset)
  88. {
  89. int value;
  90. value = pcf8575_i2c_read(dev);
  91. return (value < 0) ? value : ((value & BIT(offset)) >> offset);
  92. }
  93. static int pcf8575_set_value(struct udevice *dev, unsigned int offset,
  94. int value)
  95. {
  96. return pcf8575_direction_output(dev, offset, value);
  97. }
  98. static int pcf8575_ofdata_plat(struct udevice *dev)
  99. {
  100. struct pcf8575_chip *plat = dev_get_plat(dev);
  101. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  102. int n_latch;
  103. /*
  104. * Number of pins depends on the expander device and is specified
  105. * in the struct udevice_id (as in the Linue kernel).
  106. */
  107. uc_priv->gpio_count = dev_get_driver_data(dev) * 8;
  108. uc_priv->bank_name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
  109. "gpio-bank-name", NULL);
  110. if (!uc_priv->bank_name)
  111. uc_priv->bank_name = fdt_get_name(gd->fdt_blob,
  112. dev_of_offset(dev), NULL);
  113. n_latch = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
  114. "lines-initial-states", 0);
  115. plat->out = ~n_latch;
  116. return 0;
  117. }
  118. static int pcf8575_gpio_probe(struct udevice *dev)
  119. {
  120. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  121. debug("%s GPIO controller with %d gpios probed\n",
  122. uc_priv->bank_name, uc_priv->gpio_count);
  123. return 0;
  124. }
  125. static const struct dm_gpio_ops pcf8575_gpio_ops = {
  126. .direction_input = pcf8575_direction_input,
  127. .direction_output = pcf8575_direction_output,
  128. .get_value = pcf8575_get_value,
  129. .set_value = pcf8575_set_value,
  130. };
  131. static const struct udevice_id pcf8575_gpio_ids[] = {
  132. { .compatible = "nxp,pcf8575", .data = 2 },
  133. { .compatible = "ti,pcf8575", .data = 2 },
  134. { .compatible = "nxp,pca8574", .data = 1 },
  135. { }
  136. };
  137. U_BOOT_DRIVER(gpio_pcf8575) = {
  138. .name = "gpio_pcf8575",
  139. .id = UCLASS_GPIO,
  140. .ops = &pcf8575_gpio_ops,
  141. .of_match = pcf8575_gpio_ids,
  142. .of_to_plat = pcf8575_ofdata_plat,
  143. .probe = pcf8575_gpio_probe,
  144. .plat_auto = sizeof(struct pcf8575_chip),
  145. };