imx_rgpio2p.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2016 Freescale Semiconductor, Inc.
  4. *
  5. * RGPIO2P driver for the Freescale i.MX7ULP.
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <fdtdec.h>
  11. #include <asm/gpio.h>
  12. #include <asm/io.h>
  13. #include <dm/device-internal.h>
  14. #include <malloc.h>
  15. enum imx_rgpio2p_direction {
  16. IMX_RGPIO2P_DIRECTION_IN,
  17. IMX_RGPIO2P_DIRECTION_OUT,
  18. };
  19. #define GPIO_PER_BANK 32
  20. struct imx_rgpio2p_data {
  21. struct gpio_regs *regs;
  22. };
  23. struct imx_rgpio2p_plat {
  24. int bank_index;
  25. struct gpio_regs *regs;
  26. };
  27. static int imx_rgpio2p_is_output(struct gpio_regs *regs, int offset)
  28. {
  29. u32 val;
  30. val = readl(&regs->gpio_pddr);
  31. return val & (1 << offset) ? 1 : 0;
  32. }
  33. static void imx_rgpio2p_bank_direction(struct gpio_regs *regs, int offset,
  34. enum imx_rgpio2p_direction direction)
  35. {
  36. u32 l;
  37. l = readl(&regs->gpio_pddr);
  38. switch (direction) {
  39. case IMX_RGPIO2P_DIRECTION_OUT:
  40. l |= 1 << offset;
  41. break;
  42. case IMX_RGPIO2P_DIRECTION_IN:
  43. l &= ~(1 << offset);
  44. }
  45. writel(l, &regs->gpio_pddr);
  46. }
  47. static void imx_rgpio2p_bank_set_value(struct gpio_regs *regs, int offset,
  48. int value)
  49. {
  50. if (value)
  51. writel((1 << offset), &regs->gpio_psor);
  52. else
  53. writel((1 << offset), &regs->gpio_pcor);
  54. }
  55. static int imx_rgpio2p_bank_get_value(struct gpio_regs *regs, int offset)
  56. {
  57. return (readl(&regs->gpio_pdir) >> offset) & 0x01;
  58. }
  59. static int imx_rgpio2p_direction_input(struct udevice *dev, unsigned offset)
  60. {
  61. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  62. /* Configure GPIO direction as input. */
  63. imx_rgpio2p_bank_direction(bank->regs, offset, IMX_RGPIO2P_DIRECTION_IN);
  64. return 0;
  65. }
  66. static int imx_rgpio2p_direction_output(struct udevice *dev, unsigned offset,
  67. int value)
  68. {
  69. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  70. /* Configure GPIO output value. */
  71. imx_rgpio2p_bank_set_value(bank->regs, offset, value);
  72. /* Configure GPIO direction as output. */
  73. imx_rgpio2p_bank_direction(bank->regs, offset, IMX_RGPIO2P_DIRECTION_OUT);
  74. return 0;
  75. }
  76. static int imx_rgpio2p_get_value(struct udevice *dev, unsigned offset)
  77. {
  78. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  79. return imx_rgpio2p_bank_get_value(bank->regs, offset);
  80. }
  81. static int imx_rgpio2p_set_value(struct udevice *dev, unsigned offset,
  82. int value)
  83. {
  84. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  85. imx_rgpio2p_bank_set_value(bank->regs, offset, value);
  86. return 0;
  87. }
  88. static int imx_rgpio2p_get_function(struct udevice *dev, unsigned offset)
  89. {
  90. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  91. /* GPIOF_FUNC is not implemented yet */
  92. if (imx_rgpio2p_is_output(bank->regs, offset))
  93. return GPIOF_OUTPUT;
  94. else
  95. return GPIOF_INPUT;
  96. }
  97. static const struct dm_gpio_ops imx_rgpio2p_ops = {
  98. .direction_input = imx_rgpio2p_direction_input,
  99. .direction_output = imx_rgpio2p_direction_output,
  100. .get_value = imx_rgpio2p_get_value,
  101. .set_value = imx_rgpio2p_set_value,
  102. .get_function = imx_rgpio2p_get_function,
  103. };
  104. static int imx_rgpio2p_probe(struct udevice *dev)
  105. {
  106. struct imx_rgpio2p_data *bank = dev_get_priv(dev);
  107. struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
  108. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  109. int banknum;
  110. char name[18], *str;
  111. banknum = plat->bank_index;
  112. sprintf(name, "GPIO%d_", banknum + 1);
  113. str = strdup(name);
  114. if (!str)
  115. return -ENOMEM;
  116. uc_priv->bank_name = str;
  117. uc_priv->gpio_count = GPIO_PER_BANK;
  118. bank->regs = plat->regs;
  119. return 0;
  120. }
  121. static int imx_rgpio2p_bind(struct udevice *dev)
  122. {
  123. struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
  124. fdt_addr_t addr;
  125. /*
  126. * If plat already exsits, directly return.
  127. * Actually only when DT is not supported, plat
  128. * is statically initialized in U_BOOT_DRVINFOS.Here
  129. * will return.
  130. */
  131. if (plat)
  132. return 0;
  133. addr = devfdt_get_addr_index(dev, 1);
  134. if (addr == FDT_ADDR_T_NONE)
  135. return -EINVAL;
  136. /*
  137. * TODO:
  138. * When every board is converted to driver model and DT is supported,
  139. * this can be done by auto-alloc feature, but not using calloc
  140. * to alloc memory for plat.
  141. *
  142. * For example imx_rgpio2p_plat uses platform data rather than device
  143. * tree.
  144. *
  145. * NOTE: DO NOT COPY this code if you are using device tree.
  146. */
  147. plat = calloc(1, sizeof(*plat));
  148. if (!plat)
  149. return -ENOMEM;
  150. plat->regs = (struct gpio_regs *)addr;
  151. plat->bank_index = dev_seq(dev);
  152. dev_set_plat(dev, plat);
  153. return 0;
  154. }
  155. static const struct udevice_id imx_rgpio2p_ids[] = {
  156. { .compatible = "fsl,imx7ulp-gpio" },
  157. { }
  158. };
  159. U_BOOT_DRIVER(imx_rgpio2p) = {
  160. .name = "imx_rgpio2p",
  161. .id = UCLASS_GPIO,
  162. .ops = &imx_rgpio2p_ops,
  163. .probe = imx_rgpio2p_probe,
  164. .priv_auto = sizeof(struct imx_rgpio2p_plat),
  165. .of_match = imx_rgpio2p_ids,
  166. .bind = imx_rgpio2p_bind,
  167. };
  168. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  169. static const struct imx_rgpio2p_plat imx_plat[] = {
  170. { 0, (struct gpio_regs *)RGPIO2P_GPIO1_BASE_ADDR },
  171. { 1, (struct gpio_regs *)RGPIO2P_GPIO2_BASE_ADDR },
  172. { 2, (struct gpio_regs *)RGPIO2P_GPIO3_BASE_ADDR },
  173. { 3, (struct gpio_regs *)RGPIO2P_GPIO4_BASE_ADDR },
  174. { 4, (struct gpio_regs *)RGPIO2P_GPIO5_BASE_ADDR },
  175. { 5, (struct gpio_regs *)RGPIO2P_GPIO6_BASE_ADDR },
  176. };
  177. U_BOOT_DRVINFOS(imx_rgpio2ps) = {
  178. { "imx_rgpio2p", &imx_plat[0] },
  179. { "imx_rgpio2p", &imx_plat[1] },
  180. { "imx_rgpio2p", &imx_plat[2] },
  181. { "imx_rgpio2p", &imx_plat[3] },
  182. { "imx_rgpio2p", &imx_plat[4] },
  183. { "imx_rgpio2p", &imx_plat[5] },
  184. };
  185. #endif