dwapb_gpio.c 5.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2015 Marek Vasut <marex@denx.de>
  4. *
  5. * DesignWare APB GPIO driver
  6. */
  7. #include <common.h>
  8. #include <log.h>
  9. #include <malloc.h>
  10. #include <asm/arch/gpio.h>
  11. #include <asm/gpio.h>
  12. #include <asm/io.h>
  13. #include <dm.h>
  14. #include <dm/device-internal.h>
  15. #include <dm/device_compat.h>
  16. #include <dm/devres.h>
  17. #include <dm/lists.h>
  18. #include <dm/root.h>
  19. #include <errno.h>
  20. #include <reset.h>
  21. #include <linux/bitops.h>
  22. #define GPIO_SWPORT_DR(p) (0x00 + (p) * 0xc)
  23. #define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc)
  24. #define GPIO_INTEN 0x30
  25. #define GPIO_INTMASK 0x34
  26. #define GPIO_INTTYPE_LEVEL 0x38
  27. #define GPIO_INT_POLARITY 0x3c
  28. #define GPIO_INTSTATUS 0x40
  29. #define GPIO_PORTA_DEBOUNCE 0x48
  30. #define GPIO_PORTA_EOI 0x4c
  31. #define GPIO_EXT_PORT(p) (0x50 + (p) * 4)
  32. struct gpio_dwapb_priv {
  33. struct reset_ctl_bulk resets;
  34. };
  35. struct gpio_dwapb_plat {
  36. const char *name;
  37. int bank;
  38. int pins;
  39. void __iomem *base;
  40. };
  41. static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
  42. {
  43. struct gpio_dwapb_plat *plat = dev_get_plat(dev);
  44. clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
  45. return 0;
  46. }
  47. static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
  48. int val)
  49. {
  50. struct gpio_dwapb_plat *plat = dev_get_plat(dev);
  51. setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
  52. if (val)
  53. setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
  54. else
  55. clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
  56. return 0;
  57. }
  58. static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
  59. {
  60. struct gpio_dwapb_plat *plat = dev_get_plat(dev);
  61. if (val)
  62. setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
  63. else
  64. clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
  65. return 0;
  66. }
  67. static int dwapb_gpio_get_function(struct udevice *dev, unsigned offset)
  68. {
  69. struct gpio_dwapb_plat *plat = dev_get_plat(dev);
  70. u32 gpio;
  71. gpio = readl(plat->base + GPIO_SWPORT_DDR(plat->bank));
  72. if (gpio & BIT(offset))
  73. return GPIOF_OUTPUT;
  74. else
  75. return GPIOF_INPUT;
  76. }
  77. static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
  78. {
  79. struct gpio_dwapb_plat *plat = dev_get_plat(dev);
  80. u32 value;
  81. if (dwapb_gpio_get_function(dev, pin) == GPIOF_OUTPUT)
  82. value = readl(plat->base + GPIO_SWPORT_DR(plat->bank));
  83. else
  84. value = readl(plat->base + GPIO_EXT_PORT(plat->bank));
  85. return !!(value & BIT(pin));
  86. }
  87. static const struct dm_gpio_ops gpio_dwapb_ops = {
  88. .direction_input = dwapb_gpio_direction_input,
  89. .direction_output = dwapb_gpio_direction_output,
  90. .get_value = dwapb_gpio_get_value,
  91. .set_value = dwapb_gpio_set_value,
  92. .get_function = dwapb_gpio_get_function,
  93. };
  94. static int gpio_dwapb_reset(struct udevice *dev)
  95. {
  96. int ret;
  97. struct gpio_dwapb_priv *priv = dev_get_priv(dev);
  98. ret = reset_get_bulk(dev, &priv->resets);
  99. if (ret) {
  100. /* Return 0 if error due to !CONFIG_DM_RESET and reset
  101. * DT property is not present.
  102. */
  103. if (ret == -ENOENT || ret == -ENOTSUPP)
  104. return 0;
  105. dev_warn(dev, "Can't get reset: %d\n", ret);
  106. return ret;
  107. }
  108. ret = reset_deassert_bulk(&priv->resets);
  109. if (ret) {
  110. reset_release_bulk(&priv->resets);
  111. dev_err(dev, "Failed to reset: %d\n", ret);
  112. return ret;
  113. }
  114. return 0;
  115. }
  116. static int gpio_dwapb_probe(struct udevice *dev)
  117. {
  118. struct gpio_dev_priv *priv = dev_get_uclass_priv(dev);
  119. struct gpio_dwapb_plat *plat = dev_get_plat(dev);
  120. if (!plat) {
  121. /* Reset on parent device only */
  122. return gpio_dwapb_reset(dev);
  123. }
  124. priv->gpio_count = plat->pins;
  125. priv->bank_name = plat->name;
  126. return 0;
  127. }
  128. static int gpio_dwapb_bind(struct udevice *dev)
  129. {
  130. struct gpio_dwapb_plat *plat = dev_get_plat(dev);
  131. struct udevice *subdev;
  132. fdt_addr_t base;
  133. int ret, bank = 0;
  134. ofnode node;
  135. /* If this is a child device, there is nothing to do here */
  136. if (plat)
  137. return 0;
  138. base = dev_read_addr(dev);
  139. if (base == FDT_ADDR_T_NONE) {
  140. debug("Can't get the GPIO register base address\n");
  141. return -ENXIO;
  142. }
  143. for (node = dev_read_first_subnode(dev); ofnode_valid(node);
  144. node = dev_read_next_subnode(node)) {
  145. if (!ofnode_read_bool(node, "gpio-controller"))
  146. continue;
  147. plat = devm_kcalloc(dev, 1, sizeof(*plat), GFP_KERNEL);
  148. if (!plat)
  149. return -ENOMEM;
  150. plat->base = (void *)base;
  151. plat->bank = bank;
  152. plat->pins = ofnode_read_u32_default(node, "snps,nr-gpios", 0);
  153. if (ofnode_read_string_index(node, "bank-name", 0,
  154. &plat->name)) {
  155. /*
  156. * Fall back to node name. This means accessing pins
  157. * via bank name won't work.
  158. */
  159. char name[32];
  160. snprintf(name, sizeof(name), "%s_",
  161. ofnode_get_name(node));
  162. plat->name = strdup(name);
  163. if (!plat->name) {
  164. kfree(plat);
  165. return -ENOMEM;
  166. }
  167. }
  168. ret = device_bind(dev, dev->driver, plat->name, plat, node,
  169. &subdev);
  170. if (ret)
  171. return ret;
  172. bank++;
  173. }
  174. return 0;
  175. }
  176. static int gpio_dwapb_remove(struct udevice *dev)
  177. {
  178. struct gpio_dwapb_plat *plat = dev_get_plat(dev);
  179. struct gpio_dwapb_priv *priv = dev_get_priv(dev);
  180. if (!plat && priv)
  181. return reset_release_bulk(&priv->resets);
  182. return 0;
  183. }
  184. static const struct udevice_id gpio_dwapb_ids[] = {
  185. { .compatible = "snps,dw-apb-gpio" },
  186. { }
  187. };
  188. U_BOOT_DRIVER(gpio_dwapb) = {
  189. .name = "gpio-dwapb",
  190. .id = UCLASS_GPIO,
  191. .of_match = gpio_dwapb_ids,
  192. .ops = &gpio_dwapb_ops,
  193. .bind = gpio_dwapb_bind,
  194. .probe = gpio_dwapb_probe,
  195. .remove = gpio_dwapb_remove,
  196. .priv_auto = sizeof(struct gpio_dwapb_priv),
  197. };