lattice.c 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2010
  4. * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  5. *
  6. * (C) Copyright 2002
  7. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  8. *
  9. * ispVM functions adapted from Lattice's ispmVMEmbedded code:
  10. * Copyright 2009 Lattice Semiconductor Corp.
  11. */
  12. #include <common.h>
  13. #include <log.h>
  14. #include <malloc.h>
  15. #include <fpga.h>
  16. #include <lattice.h>
  17. #include <linux/delay.h>
  18. static lattice_board_specific_func *pfns;
  19. static const char *fpga_image;
  20. static unsigned long read_bytes;
  21. static unsigned long bufsize;
  22. static unsigned short expectedCRC;
  23. /*
  24. * External variables and functions declared in ivm_core.c module.
  25. */
  26. extern unsigned short g_usCalculatedCRC;
  27. extern unsigned short g_usDataType;
  28. extern unsigned char *g_pucIntelBuffer;
  29. extern unsigned char *g_pucHeapMemory;
  30. extern unsigned short g_iHeapCounter;
  31. extern unsigned short g_iHEAPSize;
  32. extern unsigned short g_usIntelDataIndex;
  33. extern unsigned short g_usIntelBufferSize;
  34. extern char *const g_szSupportedVersions[];
  35. /*
  36. * ispVMDelay
  37. *
  38. * Users must implement a delay to observe a_usTimeDelay, where
  39. * bit 15 of the a_usTimeDelay defines the unit.
  40. * 1 = milliseconds
  41. * 0 = microseconds
  42. * Example:
  43. * a_usTimeDelay = 0x0001 = 1 microsecond delay.
  44. * a_usTimeDelay = 0x8001 = 1 millisecond delay.
  45. *
  46. * This subroutine is called upon to provide a delay from 1 millisecond to a few
  47. * hundreds milliseconds each time.
  48. * It is understood that due to a_usTimeDelay is defined as unsigned short, a 16
  49. * bits integer, this function is restricted to produce a delay to 64000
  50. * micro-seconds or 32000 milli-second maximum. The VME file will never pass on
  51. * to this function a delay time > those maximum number. If it needs more than
  52. * those maximum, the VME file will launch the delay function several times to
  53. * realize a larger delay time cummulatively.
  54. * It is perfectly alright to provide a longer delay than required. It is not
  55. * acceptable if the delay is shorter.
  56. */
  57. void ispVMDelay(unsigned short delay)
  58. {
  59. if (delay & 0x8000)
  60. delay = (delay & ~0x8000) * 1000;
  61. udelay(delay);
  62. }
  63. void writePort(unsigned char a_ucPins, unsigned char a_ucValue)
  64. {
  65. a_ucValue = a_ucValue ? 1 : 0;
  66. switch (a_ucPins) {
  67. case g_ucPinTDI:
  68. pfns->jtag_set_tdi(a_ucValue);
  69. break;
  70. case g_ucPinTCK:
  71. pfns->jtag_set_tck(a_ucValue);
  72. break;
  73. case g_ucPinTMS:
  74. pfns->jtag_set_tms(a_ucValue);
  75. break;
  76. default:
  77. printf("%s: requested unknown pin\n", __func__);
  78. }
  79. }
  80. unsigned char readPort(void)
  81. {
  82. return pfns->jtag_get_tdo();
  83. }
  84. void sclock(void)
  85. {
  86. writePort(g_ucPinTCK, 0x01);
  87. writePort(g_ucPinTCK, 0x00);
  88. }
  89. void calibration(void)
  90. {
  91. /* Apply 2 pulses to TCK. */
  92. writePort(g_ucPinTCK, 0x00);
  93. writePort(g_ucPinTCK, 0x01);
  94. writePort(g_ucPinTCK, 0x00);
  95. writePort(g_ucPinTCK, 0x01);
  96. writePort(g_ucPinTCK, 0x00);
  97. ispVMDelay(0x8001);
  98. /* Apply 2 pulses to TCK. */
  99. writePort(g_ucPinTCK, 0x01);
  100. writePort(g_ucPinTCK, 0x00);
  101. writePort(g_ucPinTCK, 0x01);
  102. writePort(g_ucPinTCK, 0x00);
  103. }
  104. /*
  105. * GetByte
  106. *
  107. * Returns a byte to the caller. The returned byte depends on the
  108. * g_usDataType register. If the HEAP_IN bit is set, then the byte
  109. * is returned from the HEAP. If the LHEAP_IN bit is set, then
  110. * the byte is returned from the intelligent buffer. Otherwise,
  111. * the byte is returned directly from the VME file.
  112. */
  113. unsigned char GetByte(void)
  114. {
  115. unsigned char ucData;
  116. unsigned int block_size = 4 * 1024;
  117. if (g_usDataType & HEAP_IN) {
  118. /*
  119. * Get data from repeat buffer.
  120. */
  121. if (g_iHeapCounter > g_iHEAPSize) {
  122. /*
  123. * Data over-run.
  124. */
  125. return 0xFF;
  126. }
  127. ucData = g_pucHeapMemory[g_iHeapCounter++];
  128. } else if (g_usDataType & LHEAP_IN) {
  129. /*
  130. * Get data from intel buffer.
  131. */
  132. if (g_usIntelDataIndex >= g_usIntelBufferSize) {
  133. return 0xFF;
  134. }
  135. ucData = g_pucIntelBuffer[g_usIntelDataIndex++];
  136. } else {
  137. if (read_bytes == bufsize) {
  138. return 0xFF;
  139. }
  140. ucData = *fpga_image++;
  141. read_bytes++;
  142. if (!(read_bytes % block_size)) {
  143. printf("Downloading FPGA %ld/%ld completed\r",
  144. read_bytes,
  145. bufsize);
  146. }
  147. if (expectedCRC != 0) {
  148. ispVMCalculateCRC32(ucData);
  149. }
  150. }
  151. return ucData;
  152. }
  153. signed char ispVM(void)
  154. {
  155. char szFileVersion[9] = { 0 };
  156. signed char cRetCode = 0;
  157. signed char cIndex = 0;
  158. signed char cVersionIndex = 0;
  159. unsigned char ucReadByte = 0;
  160. unsigned short crc;
  161. g_pucHeapMemory = NULL;
  162. g_iHeapCounter = 0;
  163. g_iHEAPSize = 0;
  164. g_usIntelDataIndex = 0;
  165. g_usIntelBufferSize = 0;
  166. g_usCalculatedCRC = 0;
  167. expectedCRC = 0;
  168. ucReadByte = GetByte();
  169. switch (ucReadByte) {
  170. case FILE_CRC:
  171. crc = (unsigned char)GetByte();
  172. crc <<= 8;
  173. crc |= GetByte();
  174. expectedCRC = crc;
  175. for (cIndex = 0; cIndex < 8; cIndex++)
  176. szFileVersion[cIndex] = GetByte();
  177. break;
  178. default:
  179. szFileVersion[0] = (signed char) ucReadByte;
  180. for (cIndex = 1; cIndex < 8; cIndex++)
  181. szFileVersion[cIndex] = GetByte();
  182. break;
  183. }
  184. /*
  185. *
  186. * Compare the VME file version against the supported version.
  187. *
  188. */
  189. for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0;
  190. cVersionIndex++) {
  191. for (cIndex = 0; cIndex < 8; cIndex++) {
  192. if (szFileVersion[cIndex] !=
  193. g_szSupportedVersions[cVersionIndex][cIndex]) {
  194. cRetCode = VME_VERSION_FAILURE;
  195. break;
  196. }
  197. cRetCode = 0;
  198. }
  199. if (cRetCode == 0) {
  200. break;
  201. }
  202. }
  203. if (cRetCode < 0) {
  204. return VME_VERSION_FAILURE;
  205. }
  206. printf("VME file checked: starting downloading to FPGA\n");
  207. ispVMStart();
  208. cRetCode = ispVMCode();
  209. ispVMEnd();
  210. ispVMFreeMem();
  211. puts("\n");
  212. if (cRetCode == 0 && expectedCRC != 0 &&
  213. (expectedCRC != g_usCalculatedCRC)) {
  214. printf("Expected CRC: 0x%.4X\n", expectedCRC);
  215. printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC);
  216. return VME_CRC_FAILURE;
  217. }
  218. return cRetCode;
  219. }
  220. static int lattice_validate(Lattice_desc *desc, const char *fn)
  221. {
  222. int ret_val = false;
  223. if (desc) {
  224. if ((desc->family > min_lattice_type) &&
  225. (desc->family < max_lattice_type)) {
  226. if ((desc->iface > min_lattice_iface_type) &&
  227. (desc->iface < max_lattice_iface_type)) {
  228. if (desc->size) {
  229. ret_val = true;
  230. } else {
  231. printf("%s: NULL part size\n", fn);
  232. }
  233. } else {
  234. printf("%s: Invalid Interface type, %d\n",
  235. fn, desc->iface);
  236. }
  237. } else {
  238. printf("%s: Invalid family type, %d\n",
  239. fn, desc->family);
  240. }
  241. } else {
  242. printf("%s: NULL descriptor!\n", fn);
  243. }
  244. return ret_val;
  245. }
  246. int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize)
  247. {
  248. int ret_val = FPGA_FAIL;
  249. if (!lattice_validate(desc, (char *)__func__)) {
  250. printf("%s: Invalid device descriptor\n", __func__);
  251. } else {
  252. pfns = desc->iface_fns;
  253. switch (desc->family) {
  254. case Lattice_XP2:
  255. fpga_image = buf;
  256. read_bytes = 0;
  257. bufsize = bsize;
  258. debug("%s: Launching the Lattice ISPVME Loader:"
  259. " addr %p size 0x%lx...\n",
  260. __func__, fpga_image, bufsize);
  261. ret_val = ispVM();
  262. if (ret_val)
  263. printf("%s: error %d downloading FPGA image\n",
  264. __func__, ret_val);
  265. else
  266. puts("FPGA downloaded successfully\n");
  267. break;
  268. default:
  269. printf("%s: Unsupported family type, %d\n",
  270. __func__, desc->family);
  271. }
  272. }
  273. return ret_val;
  274. }
  275. int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize)
  276. {
  277. puts("Dump not supported for Lattice FPGA\n");
  278. return FPGA_FAIL;
  279. }
  280. int lattice_info(Lattice_desc *desc)
  281. {
  282. int ret_val = FPGA_FAIL;
  283. if (lattice_validate(desc, (char *)__func__)) {
  284. printf("Family: \t");
  285. switch (desc->family) {
  286. case Lattice_XP2:
  287. puts("XP2\n");
  288. break;
  289. /* Add new family types here */
  290. default:
  291. printf("Unknown family type, %d\n", desc->family);
  292. }
  293. puts("Interface type:\t");
  294. switch (desc->iface) {
  295. case lattice_jtag_mode:
  296. puts("JTAG Mode\n");
  297. break;
  298. /* Add new interface types here */
  299. default:
  300. printf("Unsupported interface type, %d\n", desc->iface);
  301. }
  302. printf("Device Size: \t%d bytes\n",
  303. desc->size);
  304. if (desc->iface_fns) {
  305. printf("Device Function Table @ 0x%p\n",
  306. desc->iface_fns);
  307. switch (desc->family) {
  308. case Lattice_XP2:
  309. break;
  310. /* Add new family types here */
  311. default:
  312. break;
  313. }
  314. } else {
  315. puts("No Device Function Table.\n");
  316. }
  317. if (desc->desc)
  318. printf("Model: \t%s\n", desc->desc);
  319. ret_val = FPGA_SUCCESS;
  320. } else {
  321. printf("%s: Invalid device descriptor\n", __func__);
  322. }
  323. return ret_val;
  324. }