clk-composite.c 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
  4. * Copyright 2019 NXP
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <malloc.h>
  9. #include <clk-uclass.h>
  10. #include <dm/device.h>
  11. #include <dm/devres.h>
  12. #include <linux/clk-provider.h>
  13. #include <clk.h>
  14. #include <linux/err.h>
  15. #include "clk.h"
  16. #define UBOOT_DM_CLK_COMPOSITE "clk_composite"
  17. static u8 clk_composite_get_parent(struct clk *clk)
  18. {
  19. struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
  20. (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
  21. struct clk *mux = composite->mux;
  22. if (mux)
  23. return clk_mux_get_parent(mux);
  24. else
  25. return 0;
  26. }
  27. static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
  28. {
  29. struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
  30. (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
  31. const struct clk_ops *mux_ops = composite->mux_ops;
  32. struct clk *mux = composite->mux;
  33. if (!mux || !mux_ops)
  34. return -ENOSYS;
  35. return mux_ops->set_parent(mux, parent);
  36. }
  37. static unsigned long clk_composite_recalc_rate(struct clk *clk)
  38. {
  39. struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
  40. (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
  41. const struct clk_ops *rate_ops = composite->rate_ops;
  42. struct clk *rate = composite->rate;
  43. if (rate && rate_ops)
  44. return rate_ops->get_rate(rate);
  45. else
  46. return clk_get_parent_rate(clk);
  47. }
  48. static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
  49. {
  50. struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
  51. (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
  52. const struct clk_ops *rate_ops = composite->rate_ops;
  53. struct clk *clk_rate = composite->rate;
  54. if (rate && rate_ops)
  55. return rate_ops->set_rate(clk_rate, rate);
  56. else
  57. return clk_get_rate(clk);
  58. }
  59. static int clk_composite_enable(struct clk *clk)
  60. {
  61. struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
  62. (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
  63. const struct clk_ops *gate_ops = composite->gate_ops;
  64. struct clk *gate = composite->gate;
  65. if (gate && gate_ops)
  66. return gate_ops->enable(gate);
  67. else
  68. return 0;
  69. }
  70. static int clk_composite_disable(struct clk *clk)
  71. {
  72. struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
  73. (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
  74. const struct clk_ops *gate_ops = composite->gate_ops;
  75. struct clk *gate = composite->gate;
  76. if (gate && gate_ops)
  77. return gate_ops->disable(gate);
  78. else
  79. return 0;
  80. }
  81. struct clk *clk_register_composite(struct device *dev, const char *name,
  82. const char * const *parent_names,
  83. int num_parents, struct clk *mux,
  84. const struct clk_ops *mux_ops,
  85. struct clk *rate,
  86. const struct clk_ops *rate_ops,
  87. struct clk *gate,
  88. const struct clk_ops *gate_ops,
  89. unsigned long flags)
  90. {
  91. struct clk *clk;
  92. struct clk_composite *composite;
  93. int ret;
  94. if (!num_parents || (num_parents != 1 && !mux))
  95. return ERR_PTR(-EINVAL);
  96. composite = kzalloc(sizeof(*composite), GFP_KERNEL);
  97. if (!composite)
  98. return ERR_PTR(-ENOMEM);
  99. if (mux && mux_ops) {
  100. composite->mux = mux;
  101. composite->mux_ops = mux_ops;
  102. mux->data = (ulong)composite;
  103. }
  104. if (rate && rate_ops) {
  105. if (!rate_ops->get_rate) {
  106. clk = ERR_PTR(-EINVAL);
  107. goto err;
  108. }
  109. composite->rate = rate;
  110. composite->rate_ops = rate_ops;
  111. rate->data = (ulong)composite;
  112. }
  113. if (gate && gate_ops) {
  114. if (!gate_ops->enable || !gate_ops->disable) {
  115. clk = ERR_PTR(-EINVAL);
  116. goto err;
  117. }
  118. composite->gate = gate;
  119. composite->gate_ops = gate_ops;
  120. gate->data = (ulong)composite;
  121. }
  122. clk = &composite->clk;
  123. clk->flags = flags;
  124. ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
  125. parent_names[clk_composite_get_parent(clk)]);
  126. if (ret) {
  127. clk = ERR_PTR(ret);
  128. goto err;
  129. }
  130. if (composite->mux)
  131. composite->mux->dev = clk->dev;
  132. if (composite->rate)
  133. composite->rate->dev = clk->dev;
  134. if (composite->gate)
  135. composite->gate->dev = clk->dev;
  136. return clk;
  137. err:
  138. kfree(composite);
  139. return clk;
  140. }
  141. static const struct clk_ops clk_composite_ops = {
  142. .set_parent = clk_composite_set_parent,
  143. .get_rate = clk_composite_recalc_rate,
  144. .set_rate = clk_composite_set_rate,
  145. .enable = clk_composite_enable,
  146. .disable = clk_composite_disable,
  147. };
  148. U_BOOT_DRIVER(clk_composite) = {
  149. .name = UBOOT_DM_CLK_COMPOSITE,
  150. .id = UCLASS_CLK,
  151. .ops = &clk_composite_ops,
  152. .flags = DM_FLAG_PRE_RELOC,
  153. };