mtk_ahci.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * MTK SATA platform driver
  4. *
  5. * Copyright (C) 2020 MediaTek Inc.
  6. *
  7. * Author: Ryder Lee <ryder.lee@mediatek.com>
  8. * Author: Frank Wunderlich <frank-w@public-files.de>
  9. */
  10. #include <common.h>
  11. #include <ahci.h>
  12. #include <asm/global_data.h>
  13. #include <asm/io.h>
  14. #include <dm.h>
  15. #include <dm/of_access.h>
  16. #include <generic-phy.h>
  17. #include <linux/err.h>
  18. #include <regmap.h>
  19. #include <reset.h>
  20. #include <sata.h>
  21. #include <scsi.h>
  22. #include <syscon.h>
  23. #include <dm/device_compat.h>
  24. #define SYS_CFG 0x14
  25. #define SYS_CFG_SATA_MSK GENMASK(31, 30)
  26. #define SYS_CFG_SATA_EN BIT(31)
  27. struct mtk_ahci_priv {
  28. void *base;
  29. struct ahci_uc_priv ahci_priv;
  30. struct regmap *mode;
  31. struct reset_ctl_bulk rst_bulk;
  32. };
  33. static int mtk_ahci_bind(struct udevice *dev)
  34. {
  35. struct udevice *scsi_dev;
  36. return ahci_bind_scsi(dev, &scsi_dev);
  37. }
  38. static int mtk_ahci_of_to_plat(struct udevice *dev)
  39. {
  40. struct mtk_ahci_priv *priv = dev_get_priv(dev);
  41. priv->base = devfdt_remap_addr_index(dev, 0);
  42. return 0;
  43. }
  44. static int mtk_ahci_parse_property(struct ahci_uc_priv *hpriv,
  45. struct udevice *dev)
  46. {
  47. struct mtk_ahci_priv *plat = dev_get_priv(dev);
  48. const void *fdt = gd->fdt_blob;
  49. /* enable SATA function if needed */
  50. if (fdt_get_property(fdt, dev_of_offset(dev),
  51. "mediatek,phy-mode", NULL)) {
  52. plat->mode = syscon_regmap_lookup_by_phandle(dev,
  53. "mediatek,phy-mode");
  54. if (IS_ERR(plat->mode)) {
  55. dev_err(dev, "missing phy-mode phandle\n");
  56. return PTR_ERR(plat->mode);
  57. }
  58. regmap_update_bits(plat->mode, SYS_CFG,
  59. SYS_CFG_SATA_MSK, SYS_CFG_SATA_EN);
  60. }
  61. ofnode_read_u32(dev_ofnode(dev), "ports-implemented",
  62. &hpriv->port_map);
  63. return 0;
  64. }
  65. static int mtk_ahci_probe(struct udevice *dev)
  66. {
  67. struct mtk_ahci_priv *priv = dev_get_priv(dev);
  68. int ret;
  69. struct phy phy;
  70. ret = mtk_ahci_parse_property(&priv->ahci_priv, dev);
  71. if (ret)
  72. return ret;
  73. ret = reset_get_bulk(dev, &priv->rst_bulk);
  74. if (!ret) {
  75. reset_assert_bulk(&priv->rst_bulk);
  76. reset_deassert_bulk(&priv->rst_bulk);
  77. } else {
  78. dev_err(dev, "Failed to get reset: %d\n", ret);
  79. }
  80. ret = generic_phy_get_by_name(dev, "sata-phy", &phy);
  81. if (ret) {
  82. pr_err("can't get the phy from DT\n");
  83. return ret;
  84. }
  85. ret = generic_phy_init(&phy);
  86. if (ret) {
  87. pr_err("unable to initialize the sata phy\n");
  88. return ret;
  89. }
  90. ret = generic_phy_power_on(&phy);
  91. if (ret) {
  92. pr_err("unable to power on the sata phy\n");
  93. return ret;
  94. }
  95. return ahci_probe_scsi(dev, (ulong)priv->base);
  96. }
  97. static const struct udevice_id mtk_ahci_ids[] = {
  98. { .compatible = "mediatek,mtk-ahci" },
  99. { }
  100. };
  101. U_BOOT_DRIVER(mtk_ahci) = {
  102. .name = "mtk_ahci",
  103. .id = UCLASS_AHCI,
  104. .of_match = mtk_ahci_ids,
  105. .bind = mtk_ahci_bind,
  106. .of_to_plat = mtk_ahci_of_to_plat,
  107. .ops = &scsi_ops,
  108. .probe = mtk_ahci_probe,
  109. .priv_auto = sizeof(struct mtk_ahci_priv),
  110. };