intel,x86-pinctrl.txt 1.3 KB

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  1. Intel x86 PINCTRL/GPIO controller
  2. Pin-muxing on x86 can be described with a node for the PINCTRL master
  3. node and a set of child nodes for each pin on the SoC.
  4. The PINCTRL master node requires the following properties:
  5. - compatible : "intel,x86-pinctrl"
  6. Pin nodes must be children of the pinctrl master node and can
  7. contain the following properties:
  8. - pad-offset - (required) offset in the IOBASE for the pin to configure
  9. - gpio-offset - (required only when 'mode-gpio' is set) 2 cells
  10. - offset in the GPIOBASE for the pin to configure
  11. - the bit shift in this register (4 = bit 4)
  12. - mode-gpio - (optional) standalone property to force the pin into GPIO mode
  13. - mode-func - (optional) function number to assign to the pin. If
  14. 'mode-gpio' is set, this property will be ignored.
  15. in case of 'mode-gpio' property set:
  16. - output-value - (optional) this set the default output value of the GPIO
  17. - direction - (optional) this set the direction of the gpio
  18. - pull-strength - (optional) this set the pull strength of the pin
  19. - pull-assign - (optional) this set the pull assignement (up/down) of the pin
  20. - invert - (optional) this input pin is inverted
  21. Example:
  22. pin_usb_host_en0@0 {
  23. gpio-offset = <0x80 8>;
  24. pad-offset = <0x260>;
  25. mode-gpio;
  26. output-value = <1>;
  27. direction = <PIN_OUTPUT>;
  28. };