intel,apl-gpio.txt 1.3 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455
  1. Intel Apollo Lake GPIO controller
  2. The Apollo Lake (APL) GPIO controller is used to control GPIO functions of
  3. the pins.
  4. Required properties:
  5. - compatible: "intel,apl-gpio"
  6. - #gpio-cells: Should be 2. The syntax of the gpio specifier used by client
  7. nodes should be the following with values derived from the SoC user manual.
  8. <[phandle of the gpio controller node]
  9. [pin number within the gpio controller]
  10. [flags]>
  11. Values for gpio specifier:
  12. - Pin number: is a GPIO pin number between 0 and 244
  13. - Flags: GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW
  14. - gpio-controller: Specifies that the node is a gpio controller.
  15. Example:
  16. ...
  17. {
  18. p2sb: p2sb@d,0 {
  19. reg = <0x02006810 0 0 0 0>;
  20. compatible = "intel,p2sb";
  21. early-regs = <IOMAP_P2SB_BAR 0x100000>;
  22. north {
  23. compatible = "intel,apl-pinctrl";
  24. intel,p2sb-port-id = <PID_GPIO_N>;
  25. gpio_n: gpio-n {
  26. compatible = "intel,gpio";
  27. gpio-controller;
  28. #gpio-cells = <2>;
  29. };
  30. };
  31. };
  32. i2c_2: i2c2@16,2 {
  33. compatible = "intel,apl-i2c", "snps,designware-i2c-pci";
  34. reg = <0x0200b210 0 0 0 0>;
  35. #address-cells = <1>;
  36. #size-cells = <0>;
  37. clock-frequency = <400000>;
  38. tpm@50 {
  39. reg = <0x50>;
  40. compatible = "google,cr50";
  41. u-boot,i2c-offset-len = <0>;
  42. ready-gpios = <&gpio_n GPIO_28 GPIO_ACTIVE_LOW>;
  43. };
  44. };
  45. };
  46. ...