README.ramboot-ppc85xx 4.2 KB

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  1. RAMBOOT for MPC85xx Platforms
  2. ==============================
  3. RAMBOOT literally means boot from DDR. But since DDR is volatile memory some
  4. pre-mechanism is required to load the DDR with the bootloader binary.
  5. - In case of SD and SPI boot this is done by BootROM code inside the chip
  6. itself.
  7. - In case of NAND boot FCM supports loading initial 4K code from NAND flash
  8. which can initialize the DDR and get the complete bootloader copied to DDR.
  9. In addition to the above there could be some more methods to initialize the DDR
  10. and load it manually.
  11. Two of them are described below.There is also an explanation as to where these
  12. methods could be handy.
  13. 1. Load the RAM based bootloader onto DDR via JTAG/BDI interface. And then
  14. execute the bootloader from DDR.
  15. This may be handy in the following cases:
  16. - In very early stage of platform bringup where other boot options are not
  17. functional because of various reasons.
  18. - In case the support to program the flashes on the board is not available.
  19. 2. Load the RAM based bootloader onto DDR using already existing bootloader on
  20. the board.And then execute the bootloader from DDR.
  21. Some usecases where this may be used:
  22. - While developing some new feature of u-boot, for example USB driver or
  23. SPI driver.
  24. Suppose the board already has a working bootloader on it. And you would
  25. prefer to keep it intact, at the same time want to test your bootloader.
  26. In this case you can get your test bootloader binary into DDR via tftp
  27. for example. Then execute the test bootloader.
  28. - Suppose a platform already has a propreitery bootloader which does not
  29. support for example AMP boot. In this case also RAM boot loader can be
  30. utilized.
  31. So basically when the original bootloader is required to be kept intact
  32. RAM based bootloader can offer an updated bootloader on the system.
  33. Both the above Bootloaders are slight variants of SDcard or SPI Flash
  34. bootloader or for that matter even NAND bootloader.
  35. All of them define CONFIG_SYS_RAMBOOT.
  36. The main difference among all of them is the way the pre-environment is getting
  37. configured and who is doing that.
  38. - In case of SD card and SPI flash bootloader this is done by On Chip BootROM inside the Si itself.
  39. - In case of NAND boot SPL/TPL code does it with some support from Si itself.
  40. - In case of the pure RAM based bootloaders we have to do it by JTAG manually or already existing bootloader.
  41. How to use them:
  42. 1. Using JTAG
  43. Boot up in core hold off mode or stop the core after reset using JTAG
  44. interface.
  45. Preconfigure DDR/L2SRAM through JTAG interface.
  46. - setup DDR controller registers.
  47. - setup DDR LAWs
  48. - setup DDR TLB
  49. Load the RAM based boot loader to the proper location in DDR/L2SRAM.
  50. set up IAR (Instruction counter properly)
  51. Enable the core to execute.
  52. 2. Using already existing bootloader.
  53. get the rambased boot loader binary into DDR/L2SRAM via tftp.
  54. execute the RAM based bootloader.
  55. => tftp 11000000 u-boot-ram.bin
  56. => go 1107f000
  57. Please note that L2SRAM can also be used instead of DDR if the SOC has
  58. sufficient size of L2SRAM.
  59. Necessary Code changes Required:
  60. =====================================
  61. Please note that below mentioned changes are for 85xx platforms.
  62. They have been tested on P1020/P2020/P1010 RDB.
  63. The main difference between the above two methods from technical perspective is
  64. that in 1st case SOC is just out of reset so it is in default configuration.
  65. (CCSRBAR is at 0xff700000).
  66. In the 2nd case bootloader has already re-located CCSRBAR to 0xffe00000
  67. 1. File name-> boards.cfg
  68. There can be added specific Make options for RAMBoot. We can keep different
  69. options for the two cases mentioned above.
  70. for example
  71. P1020RDB_JTAG_RAMBOOT and P1020RDB_GO_RAMBOOT.
  72. 2. platform config file
  73. for example include/configs/P1_P2_RDB.h
  74. #ifdef CONFIG_RAMBOOT
  75. #define CONFIG_SDCARD
  76. #endif
  77. This will finally use the CONFIG_SYS_RAMBOOT.
  78. 3. Change CONFIG_SYS_CCSRBAR_DEFAULT in menuconfig accordingly.
  79. In the section of the particular SOC, for example P1020, pseudo code
  80. #if defined(CONFIG_GO)
  81. #define CONFIG_SYS_CCSRBAR_DEFAULT 0xffe00000
  82. #else
  83. #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
  84. #endif
  85. For JTAG RAMBOOT this is not required because CCSRBAR is at ff700000.