README.pblimage 3.1 KB

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  1. ------------------------------------------------------------------
  2. Freescale PBL(pre-boot loader) Boot Image generation using mkimage
  3. ------------------------------------------------------------------
  4. The CoreNet SoC's can boot directly from eSPI FLASH, SD/MMC and
  5. NAND, etc. These SoCs use PBL to load RCW and/or pre-initialization
  6. instructions. For more details refer section 5 Pre-boot loader
  7. specifications of reference manual P3041RM/P4080RM/P5020RM at link:
  8. http://www.freescale.com/webapp/search/Serp.jsp?Reference+Manuals
  9. Building PBL Boot Image and boot steps
  10. --------------------------------------
  11. 1. Building PBL Boot Image.
  12. The default Image is u-boot.pbl.
  13. For eSPI boot(available on P2041/P3041/P4080/P5020/P5040/T4240):
  14. To build the eSPI boot image:
  15. make <board_name>_SPIFLASH
  16. For SD boot(available on P2041/P3041/P4080/P5020/P5040/T4240):
  17. To build the SD boot image:
  18. make <board_name>_SDCARD
  19. For Nand boot(available on P2041/P3041/P5020/P5040):
  20. To build the NAND boot image:
  21. make <board_name>_NAND
  22. 2. pblimage support available with mkimage utility will generate Freescale PBL
  23. boot image that can be flashed on the board eSPI flash, SD/MMC and NAND.
  24. Following steps describe it in detail.
  25. 1). Boot from eSPI flash
  26. Write u-boot.pbl to eSPI flash from offset 0x0.
  27. for ex in u-boot:
  28. =>tftp 100000 u-boot.pbl
  29. =>sf probe 0
  30. =>sf erase 0 100000
  31. =>sf write 100000 0 $filesize
  32. Change SW1[1:5] = off off on off on.
  33. 2). Boot from SD/MMC
  34. Write u-boot.pbl to SD/MMC from offset 0x1000.
  35. for ex in u-boot:
  36. =>tftp 100000 u-boot.pbl
  37. =>mmcinfo
  38. =>mmc write 100000 8 441
  39. Change SW1[1:5] = off off on on off.
  40. 3). Boot from Nand
  41. Write u-boot.pbl to Nand from offset 0x0.
  42. for ex in u-boot:
  43. =>tftp 100000 u-boot.pbl
  44. =>nand info
  45. =>nand erase 0 100000
  46. =>nand write 100000 0 $filesize
  47. Change SW1[1:5] = off on off off on
  48. Change SW7[1:4] = on off off on
  49. Board specific configuration file specifications:
  50. ------------------------------------------------
  51. 1. Configuration files rcw.cfg and pbi.cfg must present in the
  52. board/freescale/corenet_ds/, rcw.cfg is for RCW, pbi.cfg is for
  53. PBI instructions. File name must not be changed since they are used
  54. in Makefile.
  55. 2. These files can have empty lines and lines starting with "#" as first
  56. character to put comments
  57. Typical example of rcw.cfg file:
  58. -----------------------------------
  59. #PBL preamble and RCW header
  60. aa55aa55 010e0100
  61. #64 bytes RCW data
  62. 4c580000 00000000 18185218 0000cccc
  63. 40464000 3c3c2000 58000000 61000000
  64. 00000000 00000000 00000000 008b6000
  65. 00000000 00000000 00000000 00000000
  66. Typical example of pbi.cfg file:
  67. -----------------------------------
  68. #PBI commands
  69. #Initialize CPC1
  70. 09010000 00200400
  71. 09138000 00000000
  72. 091380c0 00000100
  73. 09010100 00000000
  74. 09010104 fff0000b
  75. 09010f00 08000000
  76. 09010000 80000000
  77. #Configure LAW for CPC1
  78. 09000d00 00000000
  79. 09000d04 fff00000
  80. 09000d08 81000013
  81. 09000010 00000000
  82. 09000014 ff000000
  83. 09000018 81000000
  84. #Initialize eSPI controller
  85. 09110000 80000403
  86. 09110020 2d170008
  87. 09110024 00100008
  88. 09110028 00100008
  89. 0911002c 00100008
  90. #Flush PBL data
  91. 09138000 00000000
  92. 091380c0 00000000
  93. ------------------------------------------------
  94. Author: Shaohui Xie<Shaohui.Xie@freescale.com>