i2c.c 49 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Sergey Kubushyn, himself, ksi@koi8.net
  5. *
  6. * Changes for unified multibus/multiadapter I2C support.
  7. *
  8. * (C) Copyright 2001
  9. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  10. */
  11. /*
  12. * I2C Functions similar to the standard memory functions.
  13. *
  14. * There are several parameters in many of the commands that bear further
  15. * explanations:
  16. *
  17. * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
  18. * Each I2C chip on the bus has a unique address. On the I2C data bus,
  19. * the address is the upper seven bits and the LSB is the "read/write"
  20. * bit. Note that the {i2c_chip} address specified on the command
  21. * line is not shifted up: e.g. a typical EEPROM memory chip may have
  22. * an I2C address of 0x50, but the data put on the bus will be 0xA0
  23. * for write and 0xA1 for read. This "non shifted" address notation
  24. * matches at least half of the data sheets :-/.
  25. *
  26. * {addr} is the address (or offset) within the chip. Small memory
  27. * chips have 8 bit addresses. Large memory chips have 16 bit
  28. * addresses. Other memory chips have 9, 10, or 11 bit addresses.
  29. * Many non-memory chips have multiple registers and {addr} is used
  30. * as the register index. Some non-memory chips have only one register
  31. * and therefore don't need any {addr} parameter.
  32. *
  33. * The default {addr} parameter is one byte (.1) which works well for
  34. * memories and registers with 8 bits of address space.
  35. *
  36. * You can specify the length of the {addr} field with the optional .0,
  37. * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
  38. * manipulating a single register device which doesn't use an address
  39. * field, use "0.0" for the address and the ".0" length field will
  40. * suppress the address in the I2C data stream. This also works for
  41. * successive reads using the I2C auto-incrementing memory pointer.
  42. *
  43. * If you are manipulating a large memory with 2-byte addresses, use
  44. * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
  45. *
  46. * Then there are the unfortunate memory chips that spill the most
  47. * significant 1, 2, or 3 bits of address into the chip address byte.
  48. * This effectively makes one chip (logically) look like 2, 4, or
  49. * 8 chips. This is handled (awkwardly) by #defining
  50. * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
  51. * {addr} field (since .1 is the default, it doesn't actually have to
  52. * be specified). Examples: given a memory chip at I2C chip address
  53. * 0x50, the following would happen...
  54. * i2c md 50 0 10 display 16 bytes starting at 0x000
  55. * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
  56. * i2c md 50 100 10 display 16 bytes starting at 0x100
  57. * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
  58. * i2c md 50 210 10 display 16 bytes starting at 0x210
  59. * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
  60. * This is awfully ugly. It would be nice if someone would think up
  61. * a better way of handling this.
  62. *
  63. * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
  64. */
  65. #include <common.h>
  66. #include <bootretry.h>
  67. #include <cli.h>
  68. #include <command.h>
  69. #include <console.h>
  70. #include <dm.h>
  71. #include <edid.h>
  72. #include <errno.h>
  73. #include <i2c.h>
  74. #include <log.h>
  75. #include <malloc.h>
  76. #include <asm/byteorder.h>
  77. #include <linux/compiler.h>
  78. #include <linux/delay.h>
  79. #include <u-boot/crc.h>
  80. /* Display values from last command.
  81. * Memory modify remembered values are different from display memory.
  82. */
  83. static uint i2c_dp_last_chip;
  84. static uint i2c_dp_last_addr;
  85. static uint i2c_dp_last_alen;
  86. static uint i2c_dp_last_length = 0x10;
  87. static uint i2c_mm_last_chip;
  88. static uint i2c_mm_last_addr;
  89. static uint i2c_mm_last_alen;
  90. /* If only one I2C bus is present, the list of devices to ignore when
  91. * the probe command is issued is represented by a 1D array of addresses.
  92. * When multiple buses are present, the list is an array of bus-address
  93. * pairs. The following macros take care of this */
  94. #if defined(CONFIG_SYS_I2C_NOPROBES)
  95. #if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
  96. static struct
  97. {
  98. uchar bus;
  99. uchar addr;
  100. } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
  101. #define GET_BUS_NUM i2c_get_bus_num()
  102. #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
  103. #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
  104. #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
  105. #else /* single bus */
  106. static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
  107. #define GET_BUS_NUM 0
  108. #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
  109. #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
  110. #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
  111. #endif /* defined(CONFIG_SYS_I2C_LEGACY) */
  112. #endif
  113. #define DISP_LINE_LEN 16
  114. /*
  115. * Default for driver model is to use the chip's existing address length.
  116. * For legacy code, this is not stored, so we need to use a suitable
  117. * default.
  118. */
  119. #if CONFIG_IS_ENABLED(DM_I2C)
  120. #define DEFAULT_ADDR_LEN (-1)
  121. #else
  122. #define DEFAULT_ADDR_LEN 1
  123. #endif
  124. #if CONFIG_IS_ENABLED(DM_I2C)
  125. static struct udevice *i2c_cur_bus;
  126. static int cmd_i2c_set_bus_num(unsigned int busnum)
  127. {
  128. struct udevice *bus;
  129. int ret;
  130. ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
  131. if (ret) {
  132. debug("%s: No bus %d\n", __func__, busnum);
  133. return ret;
  134. }
  135. i2c_cur_bus = bus;
  136. return 0;
  137. }
  138. static int i2c_get_cur_bus(struct udevice **busp)
  139. {
  140. #ifdef CONFIG_I2C_SET_DEFAULT_BUS_NUM
  141. if (!i2c_cur_bus) {
  142. if (cmd_i2c_set_bus_num(CONFIG_I2C_DEFAULT_BUS_NUMBER)) {
  143. printf("Default I2C bus %d not found\n",
  144. CONFIG_I2C_DEFAULT_BUS_NUMBER);
  145. return -ENODEV;
  146. }
  147. }
  148. #endif
  149. if (!i2c_cur_bus) {
  150. puts("No I2C bus selected\n");
  151. return -ENODEV;
  152. }
  153. *busp = i2c_cur_bus;
  154. return 0;
  155. }
  156. static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp)
  157. {
  158. struct udevice *bus;
  159. int ret;
  160. ret = i2c_get_cur_bus(&bus);
  161. if (ret)
  162. return ret;
  163. return i2c_get_chip(bus, chip_addr, 1, devp);
  164. }
  165. #endif
  166. /**
  167. * i2c_init_board() - Board-specific I2C bus init
  168. *
  169. * This function is the default no-op implementation of I2C bus
  170. * initialization. This function can be overridden by board-specific
  171. * implementation if needed.
  172. */
  173. __weak
  174. void i2c_init_board(void)
  175. {
  176. }
  177. /* TODO: Implement architecture-specific get/set functions */
  178. /**
  179. * i2c_get_bus_speed() - Return I2C bus speed
  180. *
  181. * This function is the default implementation of function for retrieveing
  182. * the current I2C bus speed in Hz.
  183. *
  184. * A driver implementing runtime switching of I2C bus speed must override
  185. * this function to report the speed correctly. Simple or legacy drivers
  186. * can use this fallback.
  187. *
  188. * Returns I2C bus speed in Hz.
  189. */
  190. #if !defined(CONFIG_SYS_I2C_LEGACY) && !CONFIG_IS_ENABLED(DM_I2C)
  191. /*
  192. * TODO: Implement architecture-specific get/set functions
  193. * Should go away, if we switched completely to new multibus support
  194. */
  195. __weak
  196. unsigned int i2c_get_bus_speed(void)
  197. {
  198. return CONFIG_SYS_I2C_SPEED;
  199. }
  200. /**
  201. * i2c_set_bus_speed() - Configure I2C bus speed
  202. * @speed: Newly set speed of the I2C bus in Hz
  203. *
  204. * This function is the default implementation of function for setting
  205. * the I2C bus speed in Hz.
  206. *
  207. * A driver implementing runtime switching of I2C bus speed must override
  208. * this function to report the speed correctly. Simple or legacy drivers
  209. * can use this fallback.
  210. *
  211. * Returns zero on success, negative value on error.
  212. */
  213. __weak
  214. int i2c_set_bus_speed(unsigned int speed)
  215. {
  216. if (speed != CONFIG_SYS_I2C_SPEED)
  217. return -1;
  218. return 0;
  219. }
  220. #endif
  221. /**
  222. * get_alen() - Small parser helper function to get address length
  223. *
  224. * Returns the address length.
  225. */
  226. static uint get_alen(char *arg, int default_len)
  227. {
  228. int j;
  229. int alen;
  230. alen = default_len;
  231. for (j = 0; j < 8; j++) {
  232. if (arg[j] == '.') {
  233. alen = arg[j+1] - '0';
  234. break;
  235. } else if (arg[j] == '\0')
  236. break;
  237. }
  238. return alen;
  239. }
  240. enum i2c_err_op {
  241. I2C_ERR_READ,
  242. I2C_ERR_WRITE,
  243. };
  244. static int i2c_report_err(int ret, enum i2c_err_op op)
  245. {
  246. printf("Error %s the chip: %d\n",
  247. op == I2C_ERR_READ ? "reading" : "writing", ret);
  248. return CMD_RET_FAILURE;
  249. }
  250. /**
  251. * do_i2c_read() - Handle the "i2c read" command-line command
  252. * @cmdtp: Command data struct pointer
  253. * @flag: Command flag
  254. * @argc: Command-line argument count
  255. * @argv: Array of command-line arguments
  256. *
  257. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  258. * on error.
  259. *
  260. * Syntax:
  261. * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
  262. */
  263. static int do_i2c_read(struct cmd_tbl *cmdtp, int flag, int argc,
  264. char *const argv[])
  265. {
  266. uint chip;
  267. uint devaddr, length;
  268. int alen;
  269. u_char *memaddr;
  270. int ret;
  271. #if CONFIG_IS_ENABLED(DM_I2C)
  272. struct udevice *dev;
  273. #endif
  274. if (argc != 5)
  275. return CMD_RET_USAGE;
  276. /*
  277. * I2C chip address
  278. */
  279. chip = hextoul(argv[1], NULL);
  280. /*
  281. * I2C data address within the chip. This can be 1 or
  282. * 2 bytes long. Some day it might be 3 bytes long :-).
  283. */
  284. devaddr = hextoul(argv[2], NULL);
  285. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  286. if (alen > 3)
  287. return CMD_RET_USAGE;
  288. /*
  289. * Length is the number of objects, not number of bytes.
  290. */
  291. length = hextoul(argv[3], NULL);
  292. /*
  293. * memaddr is the address where to store things in memory
  294. */
  295. memaddr = (u_char *)hextoul(argv[4], NULL);
  296. #if CONFIG_IS_ENABLED(DM_I2C)
  297. ret = i2c_get_cur_bus_chip(chip, &dev);
  298. if (!ret && alen != -1)
  299. ret = i2c_set_chip_offset_len(dev, alen);
  300. if (!ret)
  301. ret = dm_i2c_read(dev, devaddr, memaddr, length);
  302. #else
  303. ret = i2c_read(chip, devaddr, alen, memaddr, length);
  304. #endif
  305. if (ret)
  306. return i2c_report_err(ret, I2C_ERR_READ);
  307. return 0;
  308. }
  309. static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
  310. char *const argv[])
  311. {
  312. uint chip;
  313. uint devaddr, length;
  314. int alen;
  315. u_char *memaddr;
  316. int ret;
  317. #if CONFIG_IS_ENABLED(DM_I2C)
  318. struct udevice *dev;
  319. struct dm_i2c_chip *i2c_chip;
  320. #endif
  321. if ((argc < 5) || (argc > 6))
  322. return cmd_usage(cmdtp);
  323. /*
  324. * memaddr is the address where to store things in memory
  325. */
  326. memaddr = (u_char *)hextoul(argv[1], NULL);
  327. /*
  328. * I2C chip address
  329. */
  330. chip = hextoul(argv[2], NULL);
  331. /*
  332. * I2C data address within the chip. This can be 1 or
  333. * 2 bytes long. Some day it might be 3 bytes long :-).
  334. */
  335. devaddr = hextoul(argv[3], NULL);
  336. alen = get_alen(argv[3], DEFAULT_ADDR_LEN);
  337. if (alen > 3)
  338. return cmd_usage(cmdtp);
  339. /*
  340. * Length is the number of bytes.
  341. */
  342. length = hextoul(argv[4], NULL);
  343. #if CONFIG_IS_ENABLED(DM_I2C)
  344. ret = i2c_get_cur_bus_chip(chip, &dev);
  345. if (!ret && alen != -1)
  346. ret = i2c_set_chip_offset_len(dev, alen);
  347. if (ret)
  348. return i2c_report_err(ret, I2C_ERR_WRITE);
  349. i2c_chip = dev_get_parent_plat(dev);
  350. if (!i2c_chip)
  351. return i2c_report_err(ret, I2C_ERR_WRITE);
  352. #endif
  353. if (argc == 6 && !strcmp(argv[5], "-s")) {
  354. /*
  355. * Write all bytes in a single I2C transaction. If the target
  356. * device is an EEPROM, it is your responsibility to not cross
  357. * a page boundary. No write delay upon completion, take this
  358. * into account if linking commands.
  359. */
  360. #if CONFIG_IS_ENABLED(DM_I2C)
  361. i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS;
  362. ret = dm_i2c_write(dev, devaddr, memaddr, length);
  363. #else
  364. ret = i2c_write(chip, devaddr, alen, memaddr, length);
  365. #endif
  366. if (ret)
  367. return i2c_report_err(ret, I2C_ERR_WRITE);
  368. } else {
  369. /*
  370. * Repeated addressing - perform <length> separate
  371. * write transactions of one byte each
  372. */
  373. while (length-- > 0) {
  374. #if CONFIG_IS_ENABLED(DM_I2C)
  375. i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS;
  376. ret = dm_i2c_write(dev, devaddr++, memaddr++, 1);
  377. #else
  378. ret = i2c_write(chip, devaddr++, alen, memaddr++, 1);
  379. #endif
  380. if (ret)
  381. return i2c_report_err(ret, I2C_ERR_WRITE);
  382. /*
  383. * No write delay with FRAM devices.
  384. */
  385. #if !defined(CONFIG_SYS_I2C_FRAM)
  386. udelay(11000);
  387. #endif
  388. }
  389. }
  390. return 0;
  391. }
  392. #if CONFIG_IS_ENABLED(DM_I2C)
  393. static int do_i2c_flags(struct cmd_tbl *cmdtp, int flag, int argc,
  394. char *const argv[])
  395. {
  396. struct udevice *dev;
  397. uint flags;
  398. int chip;
  399. int ret;
  400. if (argc < 2)
  401. return CMD_RET_USAGE;
  402. chip = hextoul(argv[1], NULL);
  403. ret = i2c_get_cur_bus_chip(chip, &dev);
  404. if (ret)
  405. return i2c_report_err(ret, I2C_ERR_READ);
  406. if (argc > 2) {
  407. flags = hextoul(argv[2], NULL);
  408. ret = i2c_set_chip_flags(dev, flags);
  409. } else {
  410. ret = i2c_get_chip_flags(dev, &flags);
  411. if (!ret)
  412. printf("%x\n", flags);
  413. }
  414. if (ret)
  415. return i2c_report_err(ret, I2C_ERR_READ);
  416. return 0;
  417. }
  418. static int do_i2c_olen(struct cmd_tbl *cmdtp, int flag, int argc,
  419. char *const argv[])
  420. {
  421. struct udevice *dev;
  422. uint olen;
  423. int chip;
  424. int ret;
  425. if (argc < 2)
  426. return CMD_RET_USAGE;
  427. chip = hextoul(argv[1], NULL);
  428. ret = i2c_get_cur_bus_chip(chip, &dev);
  429. if (ret)
  430. return i2c_report_err(ret, I2C_ERR_READ);
  431. if (argc > 2) {
  432. olen = hextoul(argv[2], NULL);
  433. ret = i2c_set_chip_offset_len(dev, olen);
  434. } else {
  435. ret = i2c_get_chip_offset_len(dev);
  436. if (ret >= 0) {
  437. printf("%x\n", ret);
  438. ret = 0;
  439. }
  440. }
  441. if (ret)
  442. return i2c_report_err(ret, I2C_ERR_READ);
  443. return 0;
  444. }
  445. #endif
  446. /**
  447. * do_i2c_md() - Handle the "i2c md" command-line command
  448. * @cmdtp: Command data struct pointer
  449. * @flag: Command flag
  450. * @argc: Command-line argument count
  451. * @argv: Array of command-line arguments
  452. *
  453. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  454. * on error.
  455. *
  456. * Syntax:
  457. * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
  458. */
  459. static int do_i2c_md(struct cmd_tbl *cmdtp, int flag, int argc,
  460. char *const argv[])
  461. {
  462. uint chip;
  463. uint addr, length;
  464. int alen;
  465. int j, nbytes, linebytes;
  466. int ret;
  467. #if CONFIG_IS_ENABLED(DM_I2C)
  468. struct udevice *dev;
  469. #endif
  470. /* We use the last specified parameters, unless new ones are
  471. * entered.
  472. */
  473. chip = i2c_dp_last_chip;
  474. addr = i2c_dp_last_addr;
  475. alen = i2c_dp_last_alen;
  476. length = i2c_dp_last_length;
  477. if (argc < 3)
  478. return CMD_RET_USAGE;
  479. if ((flag & CMD_FLAG_REPEAT) == 0) {
  480. /*
  481. * New command specified.
  482. */
  483. /*
  484. * I2C chip address
  485. */
  486. chip = hextoul(argv[1], NULL);
  487. /*
  488. * I2C data address within the chip. This can be 1 or
  489. * 2 bytes long. Some day it might be 3 bytes long :-).
  490. */
  491. addr = hextoul(argv[2], NULL);
  492. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  493. if (alen > 3)
  494. return CMD_RET_USAGE;
  495. /*
  496. * If another parameter, it is the length to display.
  497. * Length is the number of objects, not number of bytes.
  498. */
  499. if (argc > 3)
  500. length = hextoul(argv[3], NULL);
  501. }
  502. #if CONFIG_IS_ENABLED(DM_I2C)
  503. ret = i2c_get_cur_bus_chip(chip, &dev);
  504. if (!ret && alen != -1)
  505. ret = i2c_set_chip_offset_len(dev, alen);
  506. if (ret)
  507. return i2c_report_err(ret, I2C_ERR_READ);
  508. #endif
  509. /*
  510. * Print the lines.
  511. *
  512. * We buffer all read data, so we can make sure data is read only
  513. * once.
  514. */
  515. nbytes = length;
  516. do {
  517. unsigned char linebuf[DISP_LINE_LEN];
  518. unsigned char *cp;
  519. linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
  520. #if CONFIG_IS_ENABLED(DM_I2C)
  521. ret = dm_i2c_read(dev, addr, linebuf, linebytes);
  522. #else
  523. ret = i2c_read(chip, addr, alen, linebuf, linebytes);
  524. #endif
  525. if (ret)
  526. return i2c_report_err(ret, I2C_ERR_READ);
  527. else {
  528. printf("%04x:", addr);
  529. cp = linebuf;
  530. for (j=0; j<linebytes; j++) {
  531. printf(" %02x", *cp++);
  532. addr++;
  533. }
  534. puts (" ");
  535. cp = linebuf;
  536. for (j=0; j<linebytes; j++) {
  537. if ((*cp < 0x20) || (*cp > 0x7e))
  538. puts (".");
  539. else
  540. printf("%c", *cp);
  541. cp++;
  542. }
  543. putc ('\n');
  544. }
  545. nbytes -= linebytes;
  546. } while (nbytes > 0);
  547. i2c_dp_last_chip = chip;
  548. i2c_dp_last_addr = addr;
  549. i2c_dp_last_alen = alen;
  550. i2c_dp_last_length = length;
  551. return 0;
  552. }
  553. /**
  554. * do_i2c_mw() - Handle the "i2c mw" command-line command
  555. * @cmdtp: Command data struct pointer
  556. * @flag: Command flag
  557. * @argc: Command-line argument count
  558. * @argv: Array of command-line arguments
  559. *
  560. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  561. * on error.
  562. *
  563. * Syntax:
  564. * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
  565. */
  566. static int do_i2c_mw(struct cmd_tbl *cmdtp, int flag, int argc,
  567. char *const argv[])
  568. {
  569. uint chip;
  570. ulong addr;
  571. int alen;
  572. uchar byte;
  573. int count;
  574. int ret;
  575. #if CONFIG_IS_ENABLED(DM_I2C)
  576. struct udevice *dev;
  577. #endif
  578. if ((argc < 4) || (argc > 5))
  579. return CMD_RET_USAGE;
  580. /*
  581. * Chip is always specified.
  582. */
  583. chip = hextoul(argv[1], NULL);
  584. /*
  585. * Address is always specified.
  586. */
  587. addr = hextoul(argv[2], NULL);
  588. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  589. if (alen > 3)
  590. return CMD_RET_USAGE;
  591. #if CONFIG_IS_ENABLED(DM_I2C)
  592. ret = i2c_get_cur_bus_chip(chip, &dev);
  593. if (!ret && alen != -1)
  594. ret = i2c_set_chip_offset_len(dev, alen);
  595. if (ret)
  596. return i2c_report_err(ret, I2C_ERR_WRITE);
  597. #endif
  598. /*
  599. * Value to write is always specified.
  600. */
  601. byte = hextoul(argv[3], NULL);
  602. /*
  603. * Optional count
  604. */
  605. if (argc == 5)
  606. count = hextoul(argv[4], NULL);
  607. else
  608. count = 1;
  609. while (count-- > 0) {
  610. #if CONFIG_IS_ENABLED(DM_I2C)
  611. ret = dm_i2c_write(dev, addr++, &byte, 1);
  612. #else
  613. ret = i2c_write(chip, addr++, alen, &byte, 1);
  614. #endif
  615. if (ret)
  616. return i2c_report_err(ret, I2C_ERR_WRITE);
  617. /*
  618. * Wait for the write to complete. The write can take
  619. * up to 10mSec (we allow a little more time).
  620. */
  621. /*
  622. * No write delay with FRAM devices.
  623. */
  624. #if !defined(CONFIG_SYS_I2C_FRAM)
  625. udelay(11000);
  626. #endif
  627. }
  628. return 0;
  629. }
  630. /**
  631. * do_i2c_crc() - Handle the "i2c crc32" command-line command
  632. * @cmdtp: Command data struct pointer
  633. * @flag: Command flag
  634. * @argc: Command-line argument count
  635. * @argv: Array of command-line arguments
  636. *
  637. * Calculate a CRC on memory
  638. *
  639. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  640. * on error.
  641. *
  642. * Syntax:
  643. * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
  644. */
  645. static int do_i2c_crc(struct cmd_tbl *cmdtp, int flag, int argc,
  646. char *const argv[])
  647. {
  648. uint chip;
  649. ulong addr;
  650. int alen;
  651. int count;
  652. uchar byte;
  653. ulong crc;
  654. ulong err;
  655. int ret = 0;
  656. #if CONFIG_IS_ENABLED(DM_I2C)
  657. struct udevice *dev;
  658. #endif
  659. if (argc < 4)
  660. return CMD_RET_USAGE;
  661. /*
  662. * Chip is always specified.
  663. */
  664. chip = hextoul(argv[1], NULL);
  665. /*
  666. * Address is always specified.
  667. */
  668. addr = hextoul(argv[2], NULL);
  669. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  670. if (alen > 3)
  671. return CMD_RET_USAGE;
  672. #if CONFIG_IS_ENABLED(DM_I2C)
  673. ret = i2c_get_cur_bus_chip(chip, &dev);
  674. if (!ret && alen != -1)
  675. ret = i2c_set_chip_offset_len(dev, alen);
  676. if (ret)
  677. return i2c_report_err(ret, I2C_ERR_READ);
  678. #endif
  679. /*
  680. * Count is always specified
  681. */
  682. count = hextoul(argv[3], NULL);
  683. printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
  684. /*
  685. * CRC a byte at a time. This is going to be slooow, but hey, the
  686. * memories are small and slow too so hopefully nobody notices.
  687. */
  688. crc = 0;
  689. err = 0;
  690. while (count-- > 0) {
  691. #if CONFIG_IS_ENABLED(DM_I2C)
  692. ret = dm_i2c_read(dev, addr, &byte, 1);
  693. #else
  694. ret = i2c_read(chip, addr, alen, &byte, 1);
  695. #endif
  696. if (ret)
  697. err++;
  698. crc = crc32(crc, &byte, 1);
  699. addr++;
  700. }
  701. if (err > 0)
  702. i2c_report_err(ret, I2C_ERR_READ);
  703. else
  704. printf ("%08lx\n", crc);
  705. return 0;
  706. }
  707. /**
  708. * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command
  709. * @cmdtp: Command data struct pointer
  710. * @flag: Command flag
  711. * @argc: Command-line argument count
  712. * @argv: Array of command-line arguments
  713. *
  714. * Modify memory.
  715. *
  716. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  717. * on error.
  718. *
  719. * Syntax:
  720. * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
  721. * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
  722. */
  723. static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
  724. char *const argv[])
  725. {
  726. uint chip;
  727. ulong addr;
  728. int alen;
  729. ulong data;
  730. int size = 1;
  731. int nbytes;
  732. int ret;
  733. #if CONFIG_IS_ENABLED(DM_I2C)
  734. struct udevice *dev;
  735. #endif
  736. if (argc != 3)
  737. return CMD_RET_USAGE;
  738. bootretry_reset_cmd_timeout(); /* got a good command to get here */
  739. /*
  740. * We use the last specified parameters, unless new ones are
  741. * entered.
  742. */
  743. chip = i2c_mm_last_chip;
  744. addr = i2c_mm_last_addr;
  745. alen = i2c_mm_last_alen;
  746. if ((flag & CMD_FLAG_REPEAT) == 0) {
  747. /*
  748. * New command specified. Check for a size specification.
  749. * Defaults to byte if no or incorrect specification.
  750. */
  751. size = cmd_get_data_size(argv[0], 1);
  752. /*
  753. * Chip is always specified.
  754. */
  755. chip = hextoul(argv[1], NULL);
  756. /*
  757. * Address is always specified.
  758. */
  759. addr = hextoul(argv[2], NULL);
  760. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  761. if (alen > 3)
  762. return CMD_RET_USAGE;
  763. }
  764. #if CONFIG_IS_ENABLED(DM_I2C)
  765. ret = i2c_get_cur_bus_chip(chip, &dev);
  766. if (!ret && alen != -1)
  767. ret = i2c_set_chip_offset_len(dev, alen);
  768. if (ret)
  769. return i2c_report_err(ret, I2C_ERR_WRITE);
  770. #endif
  771. /*
  772. * Print the address, followed by value. Then accept input for
  773. * the next value. A non-converted value exits.
  774. */
  775. do {
  776. printf("%08lx:", addr);
  777. #if CONFIG_IS_ENABLED(DM_I2C)
  778. ret = dm_i2c_read(dev, addr, (uchar *)&data, size);
  779. #else
  780. ret = i2c_read(chip, addr, alen, (uchar *)&data, size);
  781. #endif
  782. if (ret)
  783. return i2c_report_err(ret, I2C_ERR_READ);
  784. data = cpu_to_be32(data);
  785. if (size == 1)
  786. printf(" %02lx", (data >> 24) & 0x000000FF);
  787. else if (size == 2)
  788. printf(" %04lx", (data >> 16) & 0x0000FFFF);
  789. else
  790. printf(" %08lx", data);
  791. nbytes = cli_readline(" ? ");
  792. if (nbytes == 0) {
  793. /*
  794. * <CR> pressed as only input, don't modify current
  795. * location and move to next.
  796. */
  797. if (incrflag)
  798. addr += size;
  799. nbytes = size;
  800. /* good enough to not time out */
  801. bootretry_reset_cmd_timeout();
  802. }
  803. #ifdef CONFIG_BOOT_RETRY_TIME
  804. else if (nbytes == -2)
  805. break; /* timed out, exit the command */
  806. #endif
  807. else {
  808. char *endp;
  809. data = hextoul(console_buffer, &endp);
  810. if (size == 1)
  811. data = data << 24;
  812. else if (size == 2)
  813. data = data << 16;
  814. data = be32_to_cpu(data);
  815. nbytes = endp - console_buffer;
  816. if (nbytes) {
  817. /*
  818. * good enough to not time out
  819. */
  820. bootretry_reset_cmd_timeout();
  821. #if CONFIG_IS_ENABLED(DM_I2C)
  822. ret = dm_i2c_write(dev, addr, (uchar *)&data,
  823. size);
  824. #else
  825. ret = i2c_write(chip, addr, alen,
  826. (uchar *)&data, size);
  827. #endif
  828. if (ret)
  829. return i2c_report_err(ret,
  830. I2C_ERR_WRITE);
  831. #if CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS > 0
  832. udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  833. #endif
  834. if (incrflag)
  835. addr += size;
  836. }
  837. }
  838. } while (nbytes);
  839. i2c_mm_last_chip = chip;
  840. i2c_mm_last_addr = addr;
  841. i2c_mm_last_alen = alen;
  842. return 0;
  843. }
  844. /**
  845. * do_i2c_probe() - Handle the "i2c probe" command-line command
  846. * @cmdtp: Command data struct pointer
  847. * @flag: Command flag
  848. * @argc: Command-line argument count
  849. * @argv: Array of command-line arguments
  850. *
  851. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  852. * on error.
  853. *
  854. * Syntax:
  855. * i2c probe {addr}
  856. *
  857. * Returns zero (success) if one or more I2C devices was found
  858. */
  859. static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc,
  860. char *const argv[])
  861. {
  862. int j;
  863. int addr = -1;
  864. int found = 0;
  865. #if defined(CONFIG_SYS_I2C_NOPROBES)
  866. int k, skip;
  867. unsigned int bus = GET_BUS_NUM;
  868. #endif /* NOPROBES */
  869. int ret;
  870. #if CONFIG_IS_ENABLED(DM_I2C)
  871. struct udevice *bus, *dev;
  872. if (i2c_get_cur_bus(&bus))
  873. return CMD_RET_FAILURE;
  874. #endif
  875. if (argc == 2)
  876. addr = simple_strtol(argv[1], 0, 16);
  877. puts ("Valid chip addresses:");
  878. for (j = 0; j < 128; j++) {
  879. if ((0 <= addr) && (j != addr))
  880. continue;
  881. #if defined(CONFIG_SYS_I2C_NOPROBES)
  882. skip = 0;
  883. for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
  884. if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
  885. skip = 1;
  886. break;
  887. }
  888. }
  889. if (skip)
  890. continue;
  891. #endif
  892. #if CONFIG_IS_ENABLED(DM_I2C)
  893. ret = dm_i2c_probe(bus, j, 0, &dev);
  894. #else
  895. ret = i2c_probe(j);
  896. #endif
  897. if (ret == 0) {
  898. printf(" %02X", j);
  899. found++;
  900. }
  901. }
  902. putc ('\n');
  903. #if defined(CONFIG_SYS_I2C_NOPROBES)
  904. puts ("Excluded chip addresses:");
  905. for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
  906. if (COMPARE_BUS(bus,k))
  907. printf(" %02X", NO_PROBE_ADDR(k));
  908. }
  909. putc ('\n');
  910. #endif
  911. return (0 == found);
  912. }
  913. /**
  914. * do_i2c_loop() - Handle the "i2c loop" command-line command
  915. * @cmdtp: Command data struct pointer
  916. * @flag: Command flag
  917. * @argc: Command-line argument count
  918. * @argv: Array of command-line arguments
  919. *
  920. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  921. * on error.
  922. *
  923. * Syntax:
  924. * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
  925. * {length} - Number of bytes to read
  926. * {delay} - A DECIMAL number and defaults to 1000 uSec
  927. */
  928. static int do_i2c_loop(struct cmd_tbl *cmdtp, int flag, int argc,
  929. char *const argv[])
  930. {
  931. uint chip;
  932. int alen;
  933. uint addr;
  934. uint length;
  935. u_char bytes[16];
  936. int delay;
  937. int ret;
  938. #if CONFIG_IS_ENABLED(DM_I2C)
  939. struct udevice *dev;
  940. #endif
  941. if (argc < 3)
  942. return CMD_RET_USAGE;
  943. /*
  944. * Chip is always specified.
  945. */
  946. chip = hextoul(argv[1], NULL);
  947. /*
  948. * Address is always specified.
  949. */
  950. addr = hextoul(argv[2], NULL);
  951. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  952. if (alen > 3)
  953. return CMD_RET_USAGE;
  954. #if CONFIG_IS_ENABLED(DM_I2C)
  955. ret = i2c_get_cur_bus_chip(chip, &dev);
  956. if (!ret && alen != -1)
  957. ret = i2c_set_chip_offset_len(dev, alen);
  958. if (ret)
  959. return i2c_report_err(ret, I2C_ERR_WRITE);
  960. #endif
  961. /*
  962. * Length is the number of objects, not number of bytes.
  963. */
  964. length = 1;
  965. length = hextoul(argv[3], NULL);
  966. if (length > sizeof(bytes))
  967. length = sizeof(bytes);
  968. /*
  969. * The delay time (uSec) is optional.
  970. */
  971. delay = 1000;
  972. if (argc > 3)
  973. delay = dectoul(argv[4], NULL);
  974. /*
  975. * Run the loop...
  976. */
  977. while (1) {
  978. #if CONFIG_IS_ENABLED(DM_I2C)
  979. ret = dm_i2c_read(dev, addr, bytes, length);
  980. #else
  981. ret = i2c_read(chip, addr, alen, bytes, length);
  982. #endif
  983. if (ret)
  984. i2c_report_err(ret, I2C_ERR_READ);
  985. udelay(delay);
  986. }
  987. /* NOTREACHED */
  988. return 0;
  989. }
  990. /*
  991. * The SDRAM command is separately configured because many
  992. * (most?) embedded boards don't use SDRAM DIMMs.
  993. *
  994. * FIXME: Document and probably move elsewhere!
  995. */
  996. #if defined(CONFIG_CMD_SDRAM)
  997. static void print_ddr2_tcyc (u_char const b)
  998. {
  999. printf ("%d.", (b >> 4) & 0x0F);
  1000. switch (b & 0x0F) {
  1001. case 0x0:
  1002. case 0x1:
  1003. case 0x2:
  1004. case 0x3:
  1005. case 0x4:
  1006. case 0x5:
  1007. case 0x6:
  1008. case 0x7:
  1009. case 0x8:
  1010. case 0x9:
  1011. printf ("%d ns\n", b & 0x0F);
  1012. break;
  1013. case 0xA:
  1014. puts ("25 ns\n");
  1015. break;
  1016. case 0xB:
  1017. puts ("33 ns\n");
  1018. break;
  1019. case 0xC:
  1020. puts ("66 ns\n");
  1021. break;
  1022. case 0xD:
  1023. puts ("75 ns\n");
  1024. break;
  1025. default:
  1026. puts ("?? ns\n");
  1027. break;
  1028. }
  1029. }
  1030. static void decode_bits (u_char const b, char const *str[], int const do_once)
  1031. {
  1032. u_char mask;
  1033. for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
  1034. if (b & mask) {
  1035. puts (*str);
  1036. if (do_once)
  1037. return;
  1038. }
  1039. }
  1040. }
  1041. /*
  1042. * Syntax:
  1043. * i2c sdram {i2c_chip}
  1044. */
  1045. static int do_sdram(struct cmd_tbl *cmdtp, int flag, int argc,
  1046. char *const argv[])
  1047. {
  1048. enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;
  1049. uint chip;
  1050. u_char data[128];
  1051. u_char cksum;
  1052. int j, ret;
  1053. #if CONFIG_IS_ENABLED(DM_I2C)
  1054. struct udevice *dev;
  1055. #endif
  1056. static const char *decode_CAS_DDR2[] = {
  1057. " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
  1058. };
  1059. static const char *decode_CAS_default[] = {
  1060. " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
  1061. };
  1062. static const char *decode_CS_WE_default[] = {
  1063. " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
  1064. };
  1065. static const char *decode_byte21_default[] = {
  1066. " TBD (bit 7)\n",
  1067. " Redundant row address\n",
  1068. " Differential clock input\n",
  1069. " Registerd DQMB inputs\n",
  1070. " Buffered DQMB inputs\n",
  1071. " On-card PLL\n",
  1072. " Registered address/control lines\n",
  1073. " Buffered address/control lines\n"
  1074. };
  1075. static const char *decode_byte22_DDR2[] = {
  1076. " TBD (bit 7)\n",
  1077. " TBD (bit 6)\n",
  1078. " TBD (bit 5)\n",
  1079. " TBD (bit 4)\n",
  1080. " TBD (bit 3)\n",
  1081. " Supports partial array self refresh\n",
  1082. " Supports 50 ohm ODT\n",
  1083. " Supports weak driver\n"
  1084. };
  1085. static const char *decode_row_density_DDR2[] = {
  1086. "512 MiB", "256 MiB", "128 MiB", "16 GiB",
  1087. "8 GiB", "4 GiB", "2 GiB", "1 GiB"
  1088. };
  1089. static const char *decode_row_density_default[] = {
  1090. "512 MiB", "256 MiB", "128 MiB", "64 MiB",
  1091. "32 MiB", "16 MiB", "8 MiB", "4 MiB"
  1092. };
  1093. if (argc < 2)
  1094. return CMD_RET_USAGE;
  1095. /*
  1096. * Chip is always specified.
  1097. */
  1098. chip = hextoul(argv[1], NULL);
  1099. #if CONFIG_IS_ENABLED(DM_I2C)
  1100. ret = i2c_get_cur_bus_chip(chip, &dev);
  1101. if (!ret)
  1102. ret = dm_i2c_read(dev, 0, data, sizeof(data));
  1103. #else
  1104. ret = i2c_read(chip, 0, 1, data, sizeof(data));
  1105. #endif
  1106. if (ret) {
  1107. puts ("No SDRAM Serial Presence Detect found.\n");
  1108. return 1;
  1109. }
  1110. cksum = 0;
  1111. for (j = 0; j < 63; j++) {
  1112. cksum += data[j];
  1113. }
  1114. if (cksum != data[63]) {
  1115. printf ("WARNING: Configuration data checksum failure:\n"
  1116. " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
  1117. }
  1118. printf ("SPD data revision %d.%d\n",
  1119. (data[62] >> 4) & 0x0F, data[62] & 0x0F);
  1120. printf ("Bytes used 0x%02X\n", data[0]);
  1121. printf ("Serial memory size 0x%02X\n", 1 << data[1]);
  1122. puts ("Memory type ");
  1123. switch (data[2]) {
  1124. case 2:
  1125. type = EDO;
  1126. puts ("EDO\n");
  1127. break;
  1128. case 4:
  1129. type = SDRAM;
  1130. puts ("SDRAM\n");
  1131. break;
  1132. case 7:
  1133. type = DDR;
  1134. puts("DDR\n");
  1135. break;
  1136. case 8:
  1137. type = DDR2;
  1138. puts ("DDR2\n");
  1139. break;
  1140. case 11:
  1141. type = DDR3;
  1142. puts("DDR3\n");
  1143. break;
  1144. case 12:
  1145. type = DDR4;
  1146. puts("DDR4\n");
  1147. break;
  1148. default:
  1149. type = unknown;
  1150. puts ("unknown\n");
  1151. break;
  1152. }
  1153. puts ("Row address bits ");
  1154. if ((data[3] & 0x00F0) == 0)
  1155. printf ("%d\n", data[3] & 0x0F);
  1156. else
  1157. printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
  1158. puts ("Column address bits ");
  1159. if ((data[4] & 0x00F0) == 0)
  1160. printf ("%d\n", data[4] & 0x0F);
  1161. else
  1162. printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
  1163. switch (type) {
  1164. case DDR2:
  1165. printf ("Number of ranks %d\n",
  1166. (data[5] & 0x07) + 1);
  1167. break;
  1168. default:
  1169. printf ("Module rows %d\n", data[5]);
  1170. break;
  1171. }
  1172. switch (type) {
  1173. case DDR2:
  1174. printf ("Module data width %d bits\n", data[6]);
  1175. break;
  1176. default:
  1177. printf ("Module data width %d bits\n",
  1178. (data[7] << 8) | data[6]);
  1179. break;
  1180. }
  1181. puts ("Interface signal levels ");
  1182. switch(data[8]) {
  1183. case 0: puts ("TTL 5.0 V\n"); break;
  1184. case 1: puts ("LVTTL\n"); break;
  1185. case 2: puts ("HSTL 1.5 V\n"); break;
  1186. case 3: puts ("SSTL 3.3 V\n"); break;
  1187. case 4: puts ("SSTL 2.5 V\n"); break;
  1188. case 5: puts ("SSTL 1.8 V\n"); break;
  1189. default: puts ("unknown\n"); break;
  1190. }
  1191. switch (type) {
  1192. case DDR2:
  1193. printf ("SDRAM cycle time ");
  1194. print_ddr2_tcyc (data[9]);
  1195. break;
  1196. default:
  1197. printf ("SDRAM cycle time %d.%d ns\n",
  1198. (data[9] >> 4) & 0x0F, data[9] & 0x0F);
  1199. break;
  1200. }
  1201. switch (type) {
  1202. case DDR2:
  1203. printf ("SDRAM access time 0.%d%d ns\n",
  1204. (data[10] >> 4) & 0x0F, data[10] & 0x0F);
  1205. break;
  1206. default:
  1207. printf ("SDRAM access time %d.%d ns\n",
  1208. (data[10] >> 4) & 0x0F, data[10] & 0x0F);
  1209. break;
  1210. }
  1211. puts ("EDC configuration ");
  1212. switch (data[11]) {
  1213. case 0: puts ("None\n"); break;
  1214. case 1: puts ("Parity\n"); break;
  1215. case 2: puts ("ECC\n"); break;
  1216. default: puts ("unknown\n"); break;
  1217. }
  1218. if ((data[12] & 0x80) == 0)
  1219. puts ("No self refresh, rate ");
  1220. else
  1221. puts ("Self refresh, rate ");
  1222. switch(data[12] & 0x7F) {
  1223. case 0: puts ("15.625 us\n"); break;
  1224. case 1: puts ("3.9 us\n"); break;
  1225. case 2: puts ("7.8 us\n"); break;
  1226. case 3: puts ("31.3 us\n"); break;
  1227. case 4: puts ("62.5 us\n"); break;
  1228. case 5: puts ("125 us\n"); break;
  1229. default: puts ("unknown\n"); break;
  1230. }
  1231. switch (type) {
  1232. case DDR2:
  1233. printf ("SDRAM width (primary) %d\n", data[13]);
  1234. break;
  1235. default:
  1236. printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
  1237. if ((data[13] & 0x80) != 0) {
  1238. printf (" (second bank) %d\n",
  1239. 2 * (data[13] & 0x7F));
  1240. }
  1241. break;
  1242. }
  1243. switch (type) {
  1244. case DDR2:
  1245. if (data[14] != 0)
  1246. printf ("EDC width %d\n", data[14]);
  1247. break;
  1248. default:
  1249. if (data[14] != 0) {
  1250. printf ("EDC width %d\n",
  1251. data[14] & 0x7F);
  1252. if ((data[14] & 0x80) != 0) {
  1253. printf (" (second bank) %d\n",
  1254. 2 * (data[14] & 0x7F));
  1255. }
  1256. }
  1257. break;
  1258. }
  1259. if (DDR2 != type) {
  1260. printf ("Min clock delay, back-to-back random column addresses "
  1261. "%d\n", data[15]);
  1262. }
  1263. puts ("Burst length(s) ");
  1264. if (data[16] & 0x80) puts (" Page");
  1265. if (data[16] & 0x08) puts (" 8");
  1266. if (data[16] & 0x04) puts (" 4");
  1267. if (data[16] & 0x02) puts (" 2");
  1268. if (data[16] & 0x01) puts (" 1");
  1269. putc ('\n');
  1270. printf ("Number of banks %d\n", data[17]);
  1271. switch (type) {
  1272. case DDR2:
  1273. puts ("CAS latency(s) ");
  1274. decode_bits (data[18], decode_CAS_DDR2, 0);
  1275. putc ('\n');
  1276. break;
  1277. default:
  1278. puts ("CAS latency(s) ");
  1279. decode_bits (data[18], decode_CAS_default, 0);
  1280. putc ('\n');
  1281. break;
  1282. }
  1283. if (DDR2 != type) {
  1284. puts ("CS latency(s) ");
  1285. decode_bits (data[19], decode_CS_WE_default, 0);
  1286. putc ('\n');
  1287. }
  1288. if (DDR2 != type) {
  1289. puts ("WE latency(s) ");
  1290. decode_bits (data[20], decode_CS_WE_default, 0);
  1291. putc ('\n');
  1292. }
  1293. switch (type) {
  1294. case DDR2:
  1295. puts ("Module attributes:\n");
  1296. if (data[21] & 0x80)
  1297. puts (" TBD (bit 7)\n");
  1298. if (data[21] & 0x40)
  1299. puts (" Analysis probe installed\n");
  1300. if (data[21] & 0x20)
  1301. puts (" TBD (bit 5)\n");
  1302. if (data[21] & 0x10)
  1303. puts (" FET switch external enable\n");
  1304. printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
  1305. if (data[20] & 0x11) {
  1306. printf (" %d active registers on DIMM\n",
  1307. (data[21] & 0x03) + 1);
  1308. }
  1309. break;
  1310. default:
  1311. puts ("Module attributes:\n");
  1312. if (!data[21])
  1313. puts (" (none)\n");
  1314. else
  1315. decode_bits (data[21], decode_byte21_default, 0);
  1316. break;
  1317. }
  1318. switch (type) {
  1319. case DDR2:
  1320. decode_bits (data[22], decode_byte22_DDR2, 0);
  1321. break;
  1322. default:
  1323. puts ("Device attributes:\n");
  1324. if (data[22] & 0x80) puts (" TBD (bit 7)\n");
  1325. if (data[22] & 0x40) puts (" TBD (bit 6)\n");
  1326. if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
  1327. else puts (" Upper Vcc tolerance 10%\n");
  1328. if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
  1329. else puts (" Lower Vcc tolerance 10%\n");
  1330. if (data[22] & 0x08) puts (" Supports write1/read burst\n");
  1331. if (data[22] & 0x04) puts (" Supports precharge all\n");
  1332. if (data[22] & 0x02) puts (" Supports auto precharge\n");
  1333. if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
  1334. break;
  1335. }
  1336. switch (type) {
  1337. case DDR2:
  1338. printf ("SDRAM cycle time (2nd highest CAS latency) ");
  1339. print_ddr2_tcyc (data[23]);
  1340. break;
  1341. default:
  1342. printf ("SDRAM cycle time (2nd highest CAS latency) %d."
  1343. "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
  1344. break;
  1345. }
  1346. switch (type) {
  1347. case DDR2:
  1348. printf ("SDRAM access from clock (2nd highest CAS latency) 0."
  1349. "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
  1350. break;
  1351. default:
  1352. printf ("SDRAM access from clock (2nd highest CAS latency) %d."
  1353. "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
  1354. break;
  1355. }
  1356. switch (type) {
  1357. case DDR2:
  1358. printf ("SDRAM cycle time (3rd highest CAS latency) ");
  1359. print_ddr2_tcyc (data[25]);
  1360. break;
  1361. default:
  1362. printf ("SDRAM cycle time (3rd highest CAS latency) %d."
  1363. "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
  1364. break;
  1365. }
  1366. switch (type) {
  1367. case DDR2:
  1368. printf ("SDRAM access from clock (3rd highest CAS latency) 0."
  1369. "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
  1370. break;
  1371. default:
  1372. printf ("SDRAM access from clock (3rd highest CAS latency) %d."
  1373. "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
  1374. break;
  1375. }
  1376. switch (type) {
  1377. case DDR2:
  1378. printf ("Minimum row precharge %d.%02d ns\n",
  1379. (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
  1380. break;
  1381. default:
  1382. printf ("Minimum row precharge %d ns\n", data[27]);
  1383. break;
  1384. }
  1385. switch (type) {
  1386. case DDR2:
  1387. printf ("Row active to row active min %d.%02d ns\n",
  1388. (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
  1389. break;
  1390. default:
  1391. printf ("Row active to row active min %d ns\n", data[28]);
  1392. break;
  1393. }
  1394. switch (type) {
  1395. case DDR2:
  1396. printf ("RAS to CAS delay min %d.%02d ns\n",
  1397. (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
  1398. break;
  1399. default:
  1400. printf ("RAS to CAS delay min %d ns\n", data[29]);
  1401. break;
  1402. }
  1403. printf ("Minimum RAS pulse width %d ns\n", data[30]);
  1404. switch (type) {
  1405. case DDR2:
  1406. puts ("Density of each row ");
  1407. decode_bits (data[31], decode_row_density_DDR2, 1);
  1408. putc ('\n');
  1409. break;
  1410. default:
  1411. puts ("Density of each row ");
  1412. decode_bits (data[31], decode_row_density_default, 1);
  1413. putc ('\n');
  1414. break;
  1415. }
  1416. switch (type) {
  1417. case DDR2:
  1418. puts ("Command and Address setup ");
  1419. if (data[32] >= 0xA0) {
  1420. printf ("1.%d%d ns\n",
  1421. ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
  1422. } else {
  1423. printf ("0.%d%d ns\n",
  1424. ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
  1425. }
  1426. break;
  1427. default:
  1428. printf ("Command and Address setup %c%d.%d ns\n",
  1429. (data[32] & 0x80) ? '-' : '+',
  1430. (data[32] >> 4) & 0x07, data[32] & 0x0F);
  1431. break;
  1432. }
  1433. switch (type) {
  1434. case DDR2:
  1435. puts ("Command and Address hold ");
  1436. if (data[33] >= 0xA0) {
  1437. printf ("1.%d%d ns\n",
  1438. ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
  1439. } else {
  1440. printf ("0.%d%d ns\n",
  1441. ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
  1442. }
  1443. break;
  1444. default:
  1445. printf ("Command and Address hold %c%d.%d ns\n",
  1446. (data[33] & 0x80) ? '-' : '+',
  1447. (data[33] >> 4) & 0x07, data[33] & 0x0F);
  1448. break;
  1449. }
  1450. switch (type) {
  1451. case DDR2:
  1452. printf ("Data signal input setup 0.%d%d ns\n",
  1453. (data[34] >> 4) & 0x0F, data[34] & 0x0F);
  1454. break;
  1455. default:
  1456. printf ("Data signal input setup %c%d.%d ns\n",
  1457. (data[34] & 0x80) ? '-' : '+',
  1458. (data[34] >> 4) & 0x07, data[34] & 0x0F);
  1459. break;
  1460. }
  1461. switch (type) {
  1462. case DDR2:
  1463. printf ("Data signal input hold 0.%d%d ns\n",
  1464. (data[35] >> 4) & 0x0F, data[35] & 0x0F);
  1465. break;
  1466. default:
  1467. printf ("Data signal input hold %c%d.%d ns\n",
  1468. (data[35] & 0x80) ? '-' : '+',
  1469. (data[35] >> 4) & 0x07, data[35] & 0x0F);
  1470. break;
  1471. }
  1472. puts ("Manufacturer's JEDEC ID ");
  1473. for (j = 64; j <= 71; j++)
  1474. printf ("%02X ", data[j]);
  1475. putc ('\n');
  1476. printf ("Manufacturing Location %02X\n", data[72]);
  1477. puts ("Manufacturer's Part Number ");
  1478. for (j = 73; j <= 90; j++)
  1479. printf ("%02X ", data[j]);
  1480. putc ('\n');
  1481. printf ("Revision Code %02X %02X\n", data[91], data[92]);
  1482. printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
  1483. puts ("Assembly Serial Number ");
  1484. for (j = 95; j <= 98; j++)
  1485. printf ("%02X ", data[j]);
  1486. putc ('\n');
  1487. if (DDR2 != type) {
  1488. printf ("Speed rating PC%d\n",
  1489. data[126] == 0x66 ? 66 : data[126]);
  1490. }
  1491. return 0;
  1492. }
  1493. #endif
  1494. /*
  1495. * Syntax:
  1496. * i2c edid {i2c_chip}
  1497. */
  1498. #if defined(CONFIG_I2C_EDID)
  1499. int do_edid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  1500. {
  1501. uint chip;
  1502. struct edid1_info edid;
  1503. int ret;
  1504. #if CONFIG_IS_ENABLED(DM_I2C)
  1505. struct udevice *dev;
  1506. #endif
  1507. if (argc < 2) {
  1508. cmd_usage(cmdtp);
  1509. return 1;
  1510. }
  1511. chip = hextoul(argv[1], NULL);
  1512. #if CONFIG_IS_ENABLED(DM_I2C)
  1513. ret = i2c_get_cur_bus_chip(chip, &dev);
  1514. if (!ret)
  1515. ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid));
  1516. #else
  1517. ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid));
  1518. #endif
  1519. if (ret)
  1520. return i2c_report_err(ret, I2C_ERR_READ);
  1521. if (edid_check_info(&edid)) {
  1522. puts("Content isn't valid EDID.\n");
  1523. return 1;
  1524. }
  1525. edid_print_info(&edid);
  1526. return 0;
  1527. }
  1528. #endif /* CONFIG_I2C_EDID */
  1529. #if CONFIG_IS_ENABLED(DM_I2C)
  1530. static void show_bus(struct udevice *bus)
  1531. {
  1532. struct udevice *dev;
  1533. printf("Bus %d:\t%s", dev_seq(bus), bus->name);
  1534. if (device_active(bus))
  1535. printf(" (active %d)", dev_seq(bus));
  1536. printf("\n");
  1537. for (device_find_first_child(bus, &dev);
  1538. dev;
  1539. device_find_next_child(&dev)) {
  1540. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  1541. printf(" %02x: %s, offset len %x, flags %x\n",
  1542. chip->chip_addr, dev->name, chip->offset_len,
  1543. chip->flags);
  1544. }
  1545. }
  1546. #endif
  1547. /**
  1548. * do_i2c_show_bus() - Handle the "i2c bus" command-line command
  1549. * @cmdtp: Command data struct pointer
  1550. * @flag: Command flag
  1551. * @argc: Command-line argument count
  1552. * @argv: Array of command-line arguments
  1553. *
  1554. * Returns zero always.
  1555. */
  1556. #if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
  1557. static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
  1558. char *const argv[])
  1559. {
  1560. if (argc == 1) {
  1561. /* show all busses */
  1562. #if CONFIG_IS_ENABLED(DM_I2C)
  1563. struct udevice *bus;
  1564. struct uclass *uc;
  1565. int ret;
  1566. ret = uclass_get(UCLASS_I2C, &uc);
  1567. if (ret)
  1568. return CMD_RET_FAILURE;
  1569. uclass_foreach_dev(bus, uc)
  1570. show_bus(bus);
  1571. #else
  1572. int i;
  1573. for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) {
  1574. printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
  1575. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  1576. int j;
  1577. for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
  1578. if (i2c_bus[i].next_hop[j].chip == 0)
  1579. break;
  1580. printf("->%s@0x%2x:%d",
  1581. i2c_bus[i].next_hop[j].mux.name,
  1582. i2c_bus[i].next_hop[j].chip,
  1583. i2c_bus[i].next_hop[j].channel);
  1584. }
  1585. #endif
  1586. printf("\n");
  1587. }
  1588. #endif
  1589. } else {
  1590. int i;
  1591. /* show specific bus */
  1592. i = dectoul(argv[1], NULL);
  1593. #if CONFIG_IS_ENABLED(DM_I2C)
  1594. struct udevice *bus;
  1595. int ret;
  1596. ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus);
  1597. if (ret) {
  1598. printf("Invalid bus %d: err=%d\n", i, ret);
  1599. return CMD_RET_FAILURE;
  1600. }
  1601. show_bus(bus);
  1602. #else
  1603. if (i >= CONFIG_SYS_NUM_I2C_BUSES) {
  1604. printf("Invalid bus %d\n", i);
  1605. return -1;
  1606. }
  1607. printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
  1608. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  1609. int j;
  1610. for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
  1611. if (i2c_bus[i].next_hop[j].chip == 0)
  1612. break;
  1613. printf("->%s@0x%2x:%d",
  1614. i2c_bus[i].next_hop[j].mux.name,
  1615. i2c_bus[i].next_hop[j].chip,
  1616. i2c_bus[i].next_hop[j].channel);
  1617. }
  1618. #endif
  1619. printf("\n");
  1620. #endif
  1621. }
  1622. return 0;
  1623. }
  1624. #endif
  1625. /**
  1626. * do_i2c_bus_num() - Handle the "i2c dev" command-line command
  1627. * @cmdtp: Command data struct pointer
  1628. * @flag: Command flag
  1629. * @argc: Command-line argument count
  1630. * @argv: Array of command-line arguments
  1631. *
  1632. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1633. * on error.
  1634. */
  1635. #if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
  1636. CONFIG_IS_ENABLED(DM_I2C)
  1637. static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
  1638. char *const argv[])
  1639. {
  1640. int ret = 0;
  1641. int bus_no;
  1642. if (argc == 1) {
  1643. /* querying current setting */
  1644. #if CONFIG_IS_ENABLED(DM_I2C)
  1645. struct udevice *bus;
  1646. if (!i2c_get_cur_bus(&bus))
  1647. bus_no = dev_seq(bus);
  1648. else
  1649. bus_no = -1;
  1650. #else
  1651. bus_no = i2c_get_bus_num();
  1652. #endif
  1653. printf("Current bus is %d\n", bus_no);
  1654. } else {
  1655. bus_no = dectoul(argv[1], NULL);
  1656. #if defined(CONFIG_SYS_I2C_LEGACY)
  1657. if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
  1658. printf("Invalid bus %d\n", bus_no);
  1659. return -1;
  1660. }
  1661. #endif
  1662. printf("Setting bus to %d\n", bus_no);
  1663. #if CONFIG_IS_ENABLED(DM_I2C)
  1664. ret = cmd_i2c_set_bus_num(bus_no);
  1665. #else
  1666. ret = i2c_set_bus_num(bus_no);
  1667. #endif
  1668. if (ret)
  1669. printf("Failure changing bus number (%d)\n", ret);
  1670. }
  1671. return ret ? CMD_RET_FAILURE : 0;
  1672. }
  1673. #endif /* defined(CONFIG_SYS_I2C_LEGACY) */
  1674. /**
  1675. * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
  1676. * @cmdtp: Command data struct pointer
  1677. * @flag: Command flag
  1678. * @argc: Command-line argument count
  1679. * @argv: Array of command-line arguments
  1680. *
  1681. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1682. * on error.
  1683. */
  1684. static int do_i2c_bus_speed(struct cmd_tbl *cmdtp, int flag, int argc,
  1685. char *const argv[])
  1686. {
  1687. int speed, ret=0;
  1688. #if CONFIG_IS_ENABLED(DM_I2C)
  1689. struct udevice *bus;
  1690. if (i2c_get_cur_bus(&bus))
  1691. return 1;
  1692. #endif
  1693. if (argc == 1) {
  1694. #if CONFIG_IS_ENABLED(DM_I2C)
  1695. speed = dm_i2c_get_bus_speed(bus);
  1696. #else
  1697. speed = i2c_get_bus_speed();
  1698. #endif
  1699. /* querying current speed */
  1700. printf("Current bus speed=%d\n", speed);
  1701. } else {
  1702. speed = dectoul(argv[1], NULL);
  1703. printf("Setting bus speed to %d Hz\n", speed);
  1704. #if CONFIG_IS_ENABLED(DM_I2C)
  1705. ret = dm_i2c_set_bus_speed(bus, speed);
  1706. #else
  1707. ret = i2c_set_bus_speed(speed);
  1708. #endif
  1709. if (ret)
  1710. printf("Failure changing bus speed (%d)\n", ret);
  1711. }
  1712. return ret ? CMD_RET_FAILURE : 0;
  1713. }
  1714. /**
  1715. * do_i2c_mm() - Handle the "i2c mm" command-line command
  1716. * @cmdtp: Command data struct pointer
  1717. * @flag: Command flag
  1718. * @argc: Command-line argument count
  1719. * @argv: Array of command-line arguments
  1720. *
  1721. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1722. * on error.
  1723. */
  1724. static int do_i2c_mm(struct cmd_tbl *cmdtp, int flag, int argc,
  1725. char *const argv[])
  1726. {
  1727. return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
  1728. }
  1729. /**
  1730. * do_i2c_nm() - Handle the "i2c nm" command-line command
  1731. * @cmdtp: Command data struct pointer
  1732. * @flag: Command flag
  1733. * @argc: Command-line argument count
  1734. * @argv: Array of command-line arguments
  1735. *
  1736. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1737. * on error.
  1738. */
  1739. static int do_i2c_nm(struct cmd_tbl *cmdtp, int flag, int argc,
  1740. char *const argv[])
  1741. {
  1742. return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
  1743. }
  1744. /**
  1745. * do_i2c_reset() - Handle the "i2c reset" command-line command
  1746. * @cmdtp: Command data struct pointer
  1747. * @flag: Command flag
  1748. * @argc: Command-line argument count
  1749. * @argv: Array of command-line arguments
  1750. *
  1751. * Returns zero always.
  1752. */
  1753. static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
  1754. char *const argv[])
  1755. {
  1756. #if CONFIG_IS_ENABLED(DM_I2C)
  1757. struct udevice *bus;
  1758. if (i2c_get_cur_bus(&bus))
  1759. return CMD_RET_FAILURE;
  1760. if (i2c_deblock(bus)) {
  1761. printf("Error: Not supported by the driver\n");
  1762. return CMD_RET_FAILURE;
  1763. }
  1764. #elif defined(CONFIG_SYS_I2C_LEGACY)
  1765. i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
  1766. #else
  1767. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  1768. #endif
  1769. return 0;
  1770. }
  1771. static struct cmd_tbl cmd_i2c_sub[] = {
  1772. #if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
  1773. U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
  1774. #endif
  1775. U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
  1776. #if defined(CONFIG_SYS_I2C_LEGACY) || \
  1777. defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
  1778. U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
  1779. #endif /* CONFIG_I2C_MULTI_BUS */
  1780. #if defined(CONFIG_I2C_EDID)
  1781. U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
  1782. #endif /* CONFIG_I2C_EDID */
  1783. U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
  1784. U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
  1785. U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
  1786. U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
  1787. U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
  1788. U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
  1789. U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
  1790. U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""),
  1791. #if CONFIG_IS_ENABLED(DM_I2C)
  1792. U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""),
  1793. U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""),
  1794. #endif
  1795. U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
  1796. #if defined(CONFIG_CMD_SDRAM)
  1797. U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
  1798. #endif
  1799. U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
  1800. };
  1801. static __maybe_unused void i2c_reloc(void)
  1802. {
  1803. static int relocated;
  1804. if (!relocated) {
  1805. fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub));
  1806. relocated = 1;
  1807. };
  1808. }
  1809. /**
  1810. * do_i2c() - Handle the "i2c" command-line command
  1811. * @cmdtp: Command data struct pointer
  1812. * @flag: Command flag
  1813. * @argc: Command-line argument count
  1814. * @argv: Array of command-line arguments
  1815. *
  1816. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1817. * on error.
  1818. */
  1819. static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  1820. {
  1821. struct cmd_tbl *c;
  1822. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  1823. i2c_reloc();
  1824. #endif
  1825. if (argc < 2)
  1826. return CMD_RET_USAGE;
  1827. /* Strip off leading 'i2c' command argument */
  1828. argc--;
  1829. argv++;
  1830. c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
  1831. if (c)
  1832. return c->cmd(cmdtp, flag, argc, argv);
  1833. else
  1834. return CMD_RET_USAGE;
  1835. }
  1836. /***************************************************/
  1837. #ifdef CONFIG_SYS_LONGHELP
  1838. static char i2c_help_text[] =
  1839. #if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
  1840. "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
  1841. "i2c " /* That's the prefix for the crc32 command below. */
  1842. #endif
  1843. "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
  1844. #if defined(CONFIG_SYS_I2C_LEGACY) || \
  1845. defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
  1846. "i2c dev [dev] - show or set current I2C bus\n"
  1847. #endif /* CONFIG_I2C_MULTI_BUS */
  1848. #if defined(CONFIG_I2C_EDID)
  1849. "i2c edid chip - print EDID configuration information\n"
  1850. #endif /* CONFIG_I2C_EDID */
  1851. "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
  1852. "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
  1853. "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
  1854. "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
  1855. "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
  1856. "i2c probe [address] - test for and show device(s) on the I2C bus\n"
  1857. "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n"
  1858. "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n"
  1859. " to I2C; the -s option selects bulk write in a single transaction\n"
  1860. #if CONFIG_IS_ENABLED(DM_I2C)
  1861. "i2c flags chip [flags] - set or get chip flags\n"
  1862. "i2c olen chip [offset_length] - set or get chip offset length\n"
  1863. #endif
  1864. "i2c reset - re-init the I2C Controller\n"
  1865. #if defined(CONFIG_CMD_SDRAM)
  1866. "i2c sdram chip - print SDRAM configuration information\n"
  1867. #endif
  1868. "i2c speed [speed] - show or set I2C bus speed";
  1869. #endif
  1870. U_BOOT_CMD(
  1871. i2c, 7, 1, do_i2c,
  1872. "I2C sub-system",
  1873. i2c_help_text
  1874. );