fpga.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000, 2001
  4. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  5. */
  6. /*
  7. * FPGA support
  8. */
  9. #include <common.h>
  10. #include <command.h>
  11. #include <env.h>
  12. #include <fpga.h>
  13. #include <fs.h>
  14. #include <gzip.h>
  15. #include <image.h>
  16. #include <log.h>
  17. #include <malloc.h>
  18. static long do_fpga_get_device(char *arg)
  19. {
  20. long dev = FPGA_INVALID_DEVICE;
  21. char *devstr = env_get("fpga");
  22. if (devstr)
  23. /* Should be strtol to handle -1 cases */
  24. dev = simple_strtol(devstr, NULL, 16);
  25. if (dev == FPGA_INVALID_DEVICE && arg)
  26. dev = simple_strtol(arg, NULL, 16);
  27. debug("%s: device = %ld\n", __func__, dev);
  28. return dev;
  29. }
  30. static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
  31. struct cmd_tbl *cmdtp, int argc,
  32. char *const argv[])
  33. {
  34. size_t local_data_size;
  35. long local_fpga_data;
  36. debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
  37. if (argc != cmdtp->maxargs) {
  38. debug("fpga: incorrect parameters passed\n");
  39. return CMD_RET_USAGE;
  40. }
  41. *dev = do_fpga_get_device(argv[0]);
  42. local_fpga_data = simple_strtol(argv[1], NULL, 16);
  43. if (!local_fpga_data) {
  44. debug("fpga: zero fpga_data address\n");
  45. return CMD_RET_USAGE;
  46. }
  47. *fpga_data = local_fpga_data;
  48. local_data_size = hextoul(argv[2], NULL);
  49. if (!local_data_size) {
  50. debug("fpga: zero size\n");
  51. return CMD_RET_USAGE;
  52. }
  53. *data_size = local_data_size;
  54. return 0;
  55. }
  56. #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
  57. int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  58. {
  59. size_t data_size = 0;
  60. long fpga_data, dev;
  61. int ret;
  62. struct fpga_secure_info fpga_sec_info;
  63. memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
  64. if (argc < 5) {
  65. debug("fpga: incorrect parameters passed\n");
  66. return CMD_RET_USAGE;
  67. }
  68. if (argc == 6)
  69. fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
  70. simple_strtoull(argv[5],
  71. NULL, 16);
  72. else
  73. /*
  74. * If 6th parameter is not passed then do_fpga_check_params
  75. * will get 5 instead of expected 6 which means that function
  76. * return CMD_RET_USAGE. Increase number of params +1 to pass
  77. * this.
  78. */
  79. argc++;
  80. fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL);
  81. fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL);
  82. if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
  83. fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
  84. debug("fpga: Use <fpga load> for NonSecure bitstream\n");
  85. return CMD_RET_USAGE;
  86. }
  87. if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
  88. !fpga_sec_info.userkey_addr) {
  89. debug("fpga: User key not provided\n");
  90. return CMD_RET_USAGE;
  91. }
  92. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  93. cmdtp, argc, argv);
  94. if (ret)
  95. return ret;
  96. return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
  97. }
  98. #endif
  99. #if defined(CONFIG_CMD_FPGA_LOADFS)
  100. static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
  101. char *const argv[])
  102. {
  103. size_t data_size = 0;
  104. long fpga_data, dev;
  105. int ret;
  106. fpga_fs_info fpga_fsinfo;
  107. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  108. cmdtp, argc, argv);
  109. if (ret)
  110. return ret;
  111. fpga_fsinfo.fstype = FS_TYPE_ANY;
  112. fpga_fsinfo.blocksize = (unsigned int)hextoul(argv[3], NULL);
  113. fpga_fsinfo.interface = argv[4];
  114. fpga_fsinfo.dev_part = argv[5];
  115. fpga_fsinfo.filename = argv[6];
  116. return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
  117. }
  118. #endif
  119. static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
  120. char *const argv[])
  121. {
  122. long dev = do_fpga_get_device(argv[0]);
  123. return fpga_info(dev);
  124. }
  125. static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
  126. char *const argv[])
  127. {
  128. size_t data_size = 0;
  129. long fpga_data, dev;
  130. int ret;
  131. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  132. cmdtp, argc, argv);
  133. if (ret)
  134. return ret;
  135. return fpga_dump(dev, (void *)fpga_data, data_size);
  136. }
  137. static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
  138. char *const argv[])
  139. {
  140. size_t data_size = 0;
  141. long fpga_data, dev;
  142. int ret;
  143. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  144. cmdtp, argc, argv);
  145. if (ret)
  146. return ret;
  147. return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
  148. }
  149. static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
  150. char *const argv[])
  151. {
  152. size_t data_size = 0;
  153. long fpga_data, dev;
  154. int ret;
  155. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  156. cmdtp, argc, argv);
  157. if (ret)
  158. return ret;
  159. return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
  160. }
  161. #if defined(CONFIG_CMD_FPGA_LOADP)
  162. static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
  163. char *const argv[])
  164. {
  165. size_t data_size = 0;
  166. long fpga_data, dev;
  167. int ret;
  168. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  169. cmdtp, argc, argv);
  170. if (ret)
  171. return ret;
  172. return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
  173. }
  174. #endif
  175. #if defined(CONFIG_CMD_FPGA_LOADBP)
  176. static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
  177. char *const argv[])
  178. {
  179. size_t data_size = 0;
  180. long fpga_data, dev;
  181. int ret;
  182. ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
  183. cmdtp, argc, argv);
  184. if (ret)
  185. return ret;
  186. return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
  187. BIT_PARTIAL);
  188. }
  189. #endif
  190. #if defined(CONFIG_CMD_FPGA_LOADMK)
  191. static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
  192. char *const argv[])
  193. {
  194. size_t data_size = 0;
  195. void *fpga_data = NULL;
  196. #if defined(CONFIG_FIT)
  197. const char *fit_uname = NULL;
  198. ulong fit_addr;
  199. #endif
  200. ulong dev = do_fpga_get_device(argv[0]);
  201. char *datastr = env_get("fpgadata");
  202. debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
  203. if (dev == FPGA_INVALID_DEVICE) {
  204. debug("fpga: Invalid fpga device\n");
  205. return CMD_RET_USAGE;
  206. }
  207. if (argc == 0 && !datastr) {
  208. debug("fpga: No datastr passed\n");
  209. return CMD_RET_USAGE;
  210. }
  211. if (argc == 2) {
  212. datastr = argv[1];
  213. debug("fpga: Full command with two args\n");
  214. } else if (argc == 1 && !datastr) {
  215. debug("fpga: Dev is setup - fpgadata passed\n");
  216. datastr = argv[0];
  217. }
  218. #if defined(CONFIG_FIT)
  219. if (fit_parse_subimage(datastr, (ulong)fpga_data,
  220. &fit_addr, &fit_uname)) {
  221. fpga_data = (void *)fit_addr;
  222. debug("* fpga: subimage '%s' from FIT image ",
  223. fit_uname);
  224. debug("at 0x%08lx\n", fit_addr);
  225. } else
  226. #endif
  227. {
  228. fpga_data = (void *)hextoul(datastr, NULL);
  229. debug("* fpga: cmdline image address = 0x%08lx\n",
  230. (ulong)fpga_data);
  231. }
  232. debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
  233. if (!fpga_data) {
  234. puts("Zero fpga_data address\n");
  235. return CMD_RET_USAGE;
  236. }
  237. switch (genimg_get_format(fpga_data)) {
  238. #if defined(CONFIG_LEGACY_IMAGE_FORMAT)
  239. case IMAGE_FORMAT_LEGACY:
  240. {
  241. image_header_t *hdr = (image_header_t *)fpga_data;
  242. ulong data;
  243. u8 comp;
  244. comp = image_get_comp(hdr);
  245. if (comp == IH_COMP_GZIP) {
  246. #if defined(CONFIG_GZIP)
  247. ulong image_buf = image_get_data(hdr);
  248. ulong image_size = ~0UL;
  249. data = image_get_load(hdr);
  250. if (gunzip((void *)data, ~0UL, (void *)image_buf,
  251. &image_size) != 0) {
  252. puts("GUNZIP: error\n");
  253. return CMD_RET_FAILURE;
  254. }
  255. data_size = image_size;
  256. #else
  257. puts("Gunzip image is not supported\n");
  258. return 1;
  259. #endif
  260. } else {
  261. data = (ulong)image_get_data(hdr);
  262. data_size = image_get_data_size(hdr);
  263. }
  264. return fpga_load(dev, (void *)data, data_size,
  265. BIT_FULL);
  266. }
  267. #endif
  268. #if defined(CONFIG_FIT)
  269. case IMAGE_FORMAT_FIT:
  270. {
  271. const void *fit_hdr = (const void *)fpga_data;
  272. int noffset;
  273. const void *fit_data;
  274. if (!fit_uname) {
  275. puts("No FIT subimage unit name\n");
  276. return CMD_RET_FAILURE;
  277. }
  278. if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
  279. puts("Bad FIT image format\n");
  280. return CMD_RET_FAILURE;
  281. }
  282. /* get fpga component image node offset */
  283. noffset = fit_image_get_node(fit_hdr, fit_uname);
  284. if (noffset < 0) {
  285. printf("Can't find '%s' FIT subimage\n", fit_uname);
  286. return CMD_RET_FAILURE;
  287. }
  288. /* verify integrity */
  289. if (!fit_image_verify(fit_hdr, noffset)) {
  290. puts("Bad Data Hash\n");
  291. return CMD_RET_FAILURE;
  292. }
  293. /* get fpga subimage/external data address and length */
  294. if (fit_image_get_data_and_size(fit_hdr, noffset,
  295. &fit_data, &data_size)) {
  296. puts("Fpga subimage data not found\n");
  297. return CMD_RET_FAILURE;
  298. }
  299. return fpga_load(dev, fit_data, data_size, BIT_FULL);
  300. }
  301. #endif
  302. default:
  303. puts("** Unknown image type\n");
  304. return CMD_RET_FAILURE;
  305. }
  306. }
  307. #endif
  308. static struct cmd_tbl fpga_commands[] = {
  309. U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
  310. U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
  311. U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
  312. U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
  313. #if defined(CONFIG_CMD_FPGA_LOADP)
  314. U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
  315. #endif
  316. #if defined(CONFIG_CMD_FPGA_LOADBP)
  317. U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
  318. #endif
  319. #if defined(CONFIG_CMD_FPGA_LOADFS)
  320. U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
  321. #endif
  322. #if defined(CONFIG_CMD_FPGA_LOADMK)
  323. U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
  324. #endif
  325. #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
  326. U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
  327. #endif
  328. };
  329. static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
  330. char *const argv[])
  331. {
  332. struct cmd_tbl *fpga_cmd;
  333. int ret;
  334. if (argc < 2)
  335. return CMD_RET_USAGE;
  336. fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
  337. ARRAY_SIZE(fpga_commands));
  338. if (!fpga_cmd) {
  339. debug("fpga: non existing command\n");
  340. return CMD_RET_USAGE;
  341. }
  342. argc -= 2;
  343. argv += 2;
  344. if (argc > fpga_cmd->maxargs) {
  345. debug("fpga: more parameters passed\n");
  346. return CMD_RET_USAGE;
  347. }
  348. ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
  349. return cmd_process_error(fpga_cmd, ret);
  350. }
  351. #if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
  352. U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
  353. #else
  354. U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
  355. #endif
  356. "loadable FPGA image support",
  357. "[operation type] [device number] [image address] [image size]\n"
  358. "fpga operations:\n"
  359. " dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
  360. " info\t[dev]\t\t\tlist known device information\n"
  361. " load\t[dev] [address] [size]\tLoad device from memory buffer\n"
  362. #if defined(CONFIG_CMD_FPGA_LOADP)
  363. " loadp\t[dev] [address] [size]\t"
  364. "Load device from memory buffer with partial bitstream\n"
  365. #endif
  366. " loadb\t[dev] [address] [size]\t"
  367. "Load device from bitstream buffer (Xilinx only)\n"
  368. #if defined(CONFIG_CMD_FPGA_LOADBP)
  369. " loadbp\t[dev] [address] [size]\t"
  370. "Load device from bitstream buffer with partial bitstream"
  371. "(Xilinx only)\n"
  372. #endif
  373. #if defined(CONFIG_CMD_FPGA_LOADFS)
  374. "Load device from filesystem (FAT by default) (Xilinx only)\n"
  375. " loadfs [dev] [address] [image size] [blocksize] <interface>\n"
  376. " [<dev[:part]>] <filename>\n"
  377. #endif
  378. #if defined(CONFIG_CMD_FPGA_LOADMK)
  379. " loadmk [dev] [address]\tLoad device generated with mkimage"
  380. #if defined(CONFIG_FIT)
  381. "\n"
  382. "\tFor loadmk operating on FIT format uImage address must include\n"
  383. "\tsubimage unit name in the form of addr:<subimg_uname>"
  384. #endif
  385. #endif
  386. #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
  387. "Load encrypted bitstream (Xilinx only)\n"
  388. " loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
  389. " [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
  390. "Loads the secure bistreams(authenticated/encrypted/both\n"
  391. "authenticated and encrypted) of [size] from [address].\n"
  392. "The auth-OCM/DDR flag specifies to perform authentication\n"
  393. "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
  394. "The enc flag specifies which key to be used for decryption\n"
  395. "0-device key, 1-user key, 2-no encryption.\n"
  396. "The optional Userkey address specifies from which address key\n"
  397. "has to be used for decryption if user key is selected.\n"
  398. "NOTE: the secure bitstream has to be created using Xilinx\n"
  399. "bootgen tool only.\n"
  400. #endif
  401. );