colibri-imx8x.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2019 Toradex
  4. */
  5. #include <common.h>
  6. #include <cpu_func.h>
  7. #include <init.h>
  8. #include <asm/global_data.h>
  9. #include <asm/arch/clock.h>
  10. #include <asm/arch/imx8-pins.h>
  11. #include <asm/arch/iomux.h>
  12. #include <asm/arch/sci/sci.h>
  13. #include <asm/arch/sys_proto.h>
  14. #include <asm/gpio.h>
  15. #include <asm/io.h>
  16. #include <env.h>
  17. #include <errno.h>
  18. #include <linux/libfdt.h>
  19. #include "../common/tdx-cfg-block.h"
  20. DECLARE_GLOBAL_DATA_PTR;
  21. #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
  22. (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
  23. (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
  24. (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
  25. static iomux_cfg_t uart3_pads[] = {
  26. SC_P_FLEXCAN2_RX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
  27. SC_P_FLEXCAN2_TX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL),
  28. /* Transceiver FORCEOFF# signal, mux to use pull-up */
  29. SC_P_QSPI0B_DQS | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL),
  30. };
  31. static void setup_iomux_uart(void)
  32. {
  33. imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
  34. }
  35. void board_mem_get_layout(u64 *phys_sdram_1_start,
  36. u64 *phys_sdram_1_size,
  37. u64 *phys_sdram_2_start,
  38. u64 *phys_sdram_2_size)
  39. {
  40. u32 is_dualx = 0, val = 0;
  41. sc_err_t scierr = sc_misc_otp_fuse_read(-1, 6, &val);
  42. if (scierr == SC_ERR_NONE) {
  43. /* DX has two A35 cores disabled */
  44. is_dualx = (val & 0xf) != 0x0;
  45. }
  46. *phys_sdram_1_start = PHYS_SDRAM_1;
  47. if (is_dualx)
  48. /* Our DX based SKUs only have 1 GB RAM */
  49. *phys_sdram_1_size = SZ_1G;
  50. else
  51. *phys_sdram_1_size = PHYS_SDRAM_1_SIZE;
  52. *phys_sdram_2_start = PHYS_SDRAM_2;
  53. *phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
  54. }
  55. int board_early_init_f(void)
  56. {
  57. sc_pm_clock_rate_t rate;
  58. sc_err_t err = 0;
  59. /*
  60. * This works around that having only UART3 up the baudrate is 1.2M
  61. * instead of 115.2k. Set UART0 clock root to 80 MHz
  62. */
  63. rate = 80000000;
  64. err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate);
  65. if (err != SC_ERR_NONE)
  66. return 0;
  67. /* Set UART3 clock root to 80 MHz and enable it */
  68. rate = SC_80MHZ;
  69. err = sc_pm_setup_uart(SC_R_UART_3, rate);
  70. if (err != SC_ERR_NONE)
  71. return 0;
  72. setup_iomux_uart();
  73. return 0;
  74. }
  75. #if IS_ENABLED(CONFIG_DM_GPIO)
  76. static void board_gpio_init(void)
  77. {
  78. /* TODO */
  79. }
  80. #else
  81. static inline void board_gpio_init(void) {}
  82. #endif
  83. #if IS_ENABLED(CONFIG_FEC_MXC)
  84. #include <miiphy.h>
  85. int board_phy_config(struct phy_device *phydev)
  86. {
  87. if (phydev->drv->config)
  88. phydev->drv->config(phydev);
  89. return 0;
  90. }
  91. #endif
  92. int checkboard(void)
  93. {
  94. puts("Model: Toradex Colibri iMX8X\n");
  95. build_info();
  96. print_bootinfo();
  97. return 0;
  98. }
  99. int board_init(void)
  100. {
  101. board_gpio_init();
  102. return 0;
  103. }
  104. /*
  105. * Board specific reset that is system reset.
  106. */
  107. void reset_cpu(void)
  108. {
  109. /* TODO */
  110. }
  111. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  112. int ft_board_setup(void *blob, struct bd_info *bd)
  113. {
  114. return ft_common_board_setup(blob, bd);
  115. }
  116. #endif
  117. int board_mmc_get_env_dev(int devno)
  118. {
  119. return devno;
  120. }
  121. int board_late_init(void)
  122. {
  123. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  124. /* TODO move to common */
  125. env_set("board_name", "Colibri iMX8QXP");
  126. env_set("board_rev", "v1.0");
  127. #endif
  128. return 0;
  129. }