apalis_t30.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2014-2018
  4. * Marcel Ziswiler <marcel@ziswiler.com>
  5. */
  6. #include <common.h>
  7. #include <init.h>
  8. #include <log.h>
  9. #include <asm/arch/gp_padctrl.h>
  10. #include <asm/arch/pinmux.h>
  11. #include <asm/arch-tegra/ap.h>
  12. #include <asm/arch-tegra/tegra.h>
  13. #include <asm/global_data.h>
  14. #include <asm/gpio.h>
  15. #include <asm/io.h>
  16. #include <dm.h>
  17. #include <i2c.h>
  18. #include <pci_tegra.h>
  19. #include <linux/delay.h>
  20. #include "../common/tdx-common.h"
  21. #include "pinmux-config-apalis_t30.h"
  22. DECLARE_GLOBAL_DATA_PTR;
  23. #define PMU_I2C_ADDRESS 0x2D
  24. #define MAX_I2C_RETRY 3
  25. #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
  26. #define PEX_PERST_N TEGRA_GPIO(S, 7) /* Apalis GPIO7 */
  27. #define RESET_MOCI_CTRL TEGRA_GPIO(I, 4)
  28. static int pci_reset_status;
  29. #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
  30. int arch_misc_init(void)
  31. {
  32. if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
  33. NVBOOTTYPE_RECOVERY)
  34. printf("USB recovery mode\n");
  35. return 0;
  36. }
  37. int checkboard(void)
  38. {
  39. printf("Model: Toradex Apalis T30 %dGB\n",
  40. (gd->ram_size == 0x40000000) ? 1 : 2);
  41. return 0;
  42. }
  43. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  44. int ft_board_setup(void *blob, struct bd_info *bd)
  45. {
  46. return ft_common_board_setup(blob, bd);
  47. }
  48. #endif
  49. /*
  50. * Routine: pinmux_init
  51. * Description: Do individual peripheral pinmux configs
  52. */
  53. void pinmux_init(void)
  54. {
  55. pinmux_config_pingrp_table(tegra3_pinmux_common,
  56. ARRAY_SIZE(tegra3_pinmux_common));
  57. pinmux_config_pingrp_table(unused_pins_lowpower,
  58. ARRAY_SIZE(unused_pins_lowpower));
  59. /* Initialize any non-default pad configs (APB_MISC_GP regs) */
  60. pinmux_config_drvgrp_table(apalis_t30_padctrl,
  61. ARRAY_SIZE(apalis_t30_padctrl));
  62. }
  63. #ifdef CONFIG_PCI_TEGRA
  64. int tegra_pcie_board_init(void)
  65. {
  66. struct udevice *dev;
  67. u8 addr, data[1];
  68. int err;
  69. err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
  70. if (err) {
  71. debug("%s: Cannot find PMIC I2C chip\n", __func__);
  72. return err;
  73. }
  74. /* TPS659110: VDD2_OP_REG = 1.05V */
  75. data[0] = 0x27;
  76. addr = 0x25;
  77. err = dm_i2c_write(dev, addr, data, 1);
  78. if (err) {
  79. debug("failed to set VDD supply\n");
  80. return err;
  81. }
  82. /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */
  83. data[0] = 0x0D;
  84. addr = 0x24;
  85. err = dm_i2c_write(dev, addr, data, 1);
  86. if (err) {
  87. debug("failed to enable VDD supply\n");
  88. return err;
  89. }
  90. /* TPS659110: LDO6_REG = 1.1V, ACTIVE */
  91. data[0] = 0x0D;
  92. addr = 0x35;
  93. err = dm_i2c_write(dev, addr, data, 1);
  94. if (err) {
  95. debug("failed to set AVDD supply\n");
  96. return err;
  97. }
  98. #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
  99. gpio_request(PEX_PERST_N, "PEX_PERST_N");
  100. gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
  101. #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
  102. return 0;
  103. }
  104. void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
  105. {
  106. int index = tegra_pcie_port_index_of_port(port);
  107. if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */
  108. tegra_pcie_port_reset(port);
  109. }
  110. #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
  111. /*
  112. * Apalis PCIe aka port 1 and Apalis Type Specific 4 Lane PCIe aka port
  113. * 0 share the same RESET_MOCI therefore only assert it once for both
  114. * ports to avoid losing the previously brought up port again.
  115. */
  116. else if ((index == 1) || (index == 0)) {
  117. /* only do it once per init cycle */
  118. if (pci_reset_status % 2 == 0) {
  119. /*
  120. * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on
  121. * Apalis Evaluation Board
  122. */
  123. gpio_direction_output(PEX_PERST_N, 0);
  124. gpio_direction_output(RESET_MOCI_CTRL, 0);
  125. /*
  126. * Must be asserted for 100 ms after power and clocks
  127. * are stable
  128. */
  129. mdelay(100);
  130. gpio_set_value(PEX_PERST_N, 1);
  131. /*
  132. * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not
  133. * Guaranteed Until 900 us After PEX_PERST# De-assertion
  134. */
  135. mdelay(1);
  136. gpio_set_value(RESET_MOCI_CTRL, 1);
  137. }
  138. pci_reset_status++;
  139. }
  140. #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
  141. }
  142. #endif /* CONFIG_PCI_TEGRA */
  143. /*
  144. * Backlight off before OS handover
  145. */
  146. void board_preboot_os(void)
  147. {
  148. gpio_request(TEGRA_GPIO(V, 2), "BKL1_ON");
  149. gpio_direction_output(TEGRA_GPIO(V, 2), 0);
  150. }