panda_mux_data.h 4.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2010
  4. * Texas Instruments Incorporated, <www.ti.com>
  5. *
  6. * Balaji Krishnamoorthy <balajitk@ti.com>
  7. * Aneesh V <aneesh@ti.com>
  8. */
  9. #ifndef _PANDA_MUX_DATA_H_
  10. #define _PANDA_MUX_DATA_H_
  11. #include <asm/arch/mux_omap4.h>
  12. const struct pad_conf_entry core_padconf_array_essential[] = {
  13. {GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */
  14. {GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */
  15. {GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */
  16. {GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */
  17. {GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */
  18. {GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */
  19. {GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */
  20. {GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */
  21. {GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */
  22. {GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */
  23. {SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */
  24. {SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */
  25. {SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */
  26. {SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */
  27. {SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */
  28. {SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */
  29. {SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */
  30. {SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */
  31. {SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */
  32. {SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */
  33. {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */
  34. {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */
  35. {I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */
  36. {I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */
  37. {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */
  38. {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */
  39. {I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */
  40. {I2C4_SDA, (PTU | IEN | M0)}, /* i2c4_sda */
  41. {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */
  42. {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */
  43. {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */
  44. {UART3_TX_IRTX, (M0)}, /* uart3_tx */
  45. {USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */
  46. {USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */
  47. {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */
  48. {USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */
  49. {USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */
  50. {USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */
  51. {USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */
  52. {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */
  53. {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */
  54. {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */
  55. {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */
  56. {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */
  57. {USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */
  58. {USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */
  59. {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */
  60. {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */
  61. {UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */
  62. {GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */
  63. {FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */
  64. };
  65. const struct pad_conf_entry wkup_padconf_array_essential[] = {
  66. {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
  67. {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
  68. {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */
  69. {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */
  70. };
  71. const struct pad_conf_entry wkup_padconf_array_essential_4460[] = {
  72. {PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 for TPS: Mode 3 */
  73. };
  74. #endif /* _PANDA_MUX_DATA_H_ */