mux_data.h 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2010
  4. * Texas Instruments Incorporated, <www.ti.com>
  5. *
  6. * Sricharan R <r.sricharan@ti.com>
  7. */
  8. #ifndef _EVM5430_MUX_DATA_H
  9. #define _EVM5430_MUX_DATA_H
  10. #include <asm/arch/mux_omap5.h>
  11. const struct pad_conf_entry core_padconf_array_essential[] = {
  12. {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */
  13. {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */
  14. {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */
  15. {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */
  16. {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */
  17. {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */
  18. {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */
  19. {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */
  20. {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */
  21. {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */
  22. {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */
  23. {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */
  24. {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0*/
  25. {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1*/
  26. {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2*/
  27. {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3*/
  28. {UART3_RX_IRRX, (PTU | IEN | M0)}, /* UART3_RX_IRRX */
  29. {UART3_TX_IRTX, (M0)}, /* UART3_TX_IRTX */
  30. {USBB1_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB1_HSIC_STROBE */
  31. {USBB1_HSIC_DATA, (PTU | IEN | M0)}, /* USBB1_HSIC_DATA */
  32. {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */
  33. {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */
  34. {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE*/
  35. {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */
  36. {USBD0_HS_DP, (IEN | M0)}, /* USBD0_HS_DP */
  37. {USBD0_HS_DM, (IEN | M0)}, /* USBD0_HS_DM */
  38. {USBD0_SS_RX, (IEN | M0)}, /* USBD0_SS_RX */
  39. {I2C5_SCL, (IEN | M0)}, /* I2C5_SCL */
  40. {I2C5_SDA, (IEN | M0)}, /* I2C5_SDA */
  41. {HSI2_ACWAKE, (PTU | M6)}, /* HSI2_ACWAKE */
  42. {HSI2_CAFLAG, (PTU | M6)}, /* HSI2_CAFLAG */
  43. };
  44. const struct pad_conf_entry wkup_padconf_array_essential[] = {
  45. {SR_PMIC_SCL, (PTU | IEN | M0)}, /* SR_PMIC_SCL */
  46. {SR_PMIC_SDA, (PTU | IEN | M0)}, /* SR_PMIC_SDA */
  47. {SYS_32K, (IEN | M0)}, /* SYS_32K */
  48. {FREF_CLK1_OUT, (PTD | IEN | M0)}, /* FREF_CLK1_OUT */
  49. };
  50. #endif /* _EVM4430_MUX_DATA_H */