universal.c 8.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2010 Samsung Electronics
  4. * Minkyu Kang <mk7.kang@samsung.com>
  5. * Kyungmin Park <kyungmin.park@samsung.com>
  6. */
  7. #include <common.h>
  8. #include <env.h>
  9. #include <log.h>
  10. #include <spi.h>
  11. #include <lcd.h>
  12. #include <asm/global_data.h>
  13. #include <asm/io.h>
  14. #include <asm/gpio.h>
  15. #include <asm/arch/adc.h>
  16. #include <asm/arch/pinmux.h>
  17. #include <asm/arch/watchdog.h>
  18. #include <ld9040.h>
  19. #include <linux/delay.h>
  20. #include <power/pmic.h>
  21. #include <usb.h>
  22. #include <usb/dwc2_udc.h>
  23. #include <asm/arch/cpu.h>
  24. #include <power/max8998_pmic.h>
  25. #include <libtizen.h>
  26. #include <samsung/misc.h>
  27. #include <usb_mass_storage.h>
  28. #include <asm/mach-types.h>
  29. DECLARE_GLOBAL_DATA_PTR;
  30. unsigned int board_rev;
  31. static int init_pmic_lcd(void);
  32. u32 get_board_rev(void)
  33. {
  34. return board_rev;
  35. }
  36. int exynos_power_init(void)
  37. {
  38. return init_pmic_lcd();
  39. }
  40. static int get_hwrev(void)
  41. {
  42. return board_rev & 0xFF;
  43. }
  44. static unsigned short get_adc_value(int channel)
  45. {
  46. struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
  47. unsigned short ret = 0;
  48. unsigned int reg;
  49. unsigned int loop = 0;
  50. writel(channel & 0xF, &adc->adcmux);
  51. writel((1 << 14) | (49 << 6), &adc->adccon);
  52. writel(1000 & 0xffff, &adc->adcdly);
  53. writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
  54. udelay(10);
  55. writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
  56. udelay(10);
  57. do {
  58. udelay(1);
  59. reg = readl(&adc->adccon);
  60. } while (!(reg & (1 << 15)) && (loop++ < 1000));
  61. ret = readl(&adc->adcdat0) & 0xFFF;
  62. return ret;
  63. }
  64. static int adc_power_control(int on)
  65. {
  66. struct udevice *dev;
  67. int ret;
  68. u8 reg;
  69. ret = pmic_get("max8998-pmic", &dev);
  70. if (ret) {
  71. puts("Failed to get MAX8998!\n");
  72. return ret;
  73. }
  74. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
  75. if (on)
  76. reg |= MAX8998_LDO4;
  77. else
  78. reg &= ~MAX8998_LDO4;
  79. ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
  80. if (ret) {
  81. puts("MAX8998 LDO setting error\n");
  82. return -EINVAL;
  83. }
  84. return 0;
  85. }
  86. static unsigned int get_hw_revision(void)
  87. {
  88. int hwrev, mode0, mode1;
  89. adc_power_control(1);
  90. mode0 = get_adc_value(1); /* HWREV_MODE0 */
  91. mode1 = get_adc_value(2); /* HWREV_MODE1 */
  92. /*
  93. * XXX Always set the default hwrev as the latest board
  94. * ADC = (voltage) / 3.3 * 4096
  95. */
  96. hwrev = 3;
  97. #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
  98. if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
  99. hwrev = 0x0; /* 0.01V 0.01V */
  100. if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
  101. hwrev = 0x1; /* 610mV 0.01V */
  102. if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
  103. hwrev = 0x2; /* 1.16V 0.01V */
  104. if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
  105. hwrev = 0x3; /* 1.79V 0.01V */
  106. #undef IS_RANGE
  107. debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
  108. adc_power_control(0);
  109. return hwrev;
  110. }
  111. static void check_hw_revision(void)
  112. {
  113. int hwrev;
  114. hwrev = get_hw_revision();
  115. board_rev |= hwrev;
  116. }
  117. #ifdef CONFIG_USB_GADGET
  118. static int s5pc210_phy_control(int on)
  119. {
  120. struct udevice *dev;
  121. int ret;
  122. u8 reg;
  123. ret = pmic_get("max8998-pmic", &dev);
  124. if (ret) {
  125. puts("Failed to get MAX8998!\n");
  126. return ret;
  127. }
  128. if (on) {
  129. reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
  130. reg |= MAX8998_SAFEOUT1;
  131. ret |= pmic_reg_write(dev,
  132. MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
  133. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
  134. reg |= MAX8998_LDO3;
  135. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
  136. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
  137. reg |= MAX8998_LDO8;
  138. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
  139. } else {
  140. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
  141. reg &= ~MAX8998_LDO8;
  142. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
  143. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
  144. reg &= ~MAX8998_LDO3;
  145. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
  146. reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
  147. reg &= ~MAX8998_SAFEOUT1;
  148. ret |= pmic_reg_write(dev,
  149. MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
  150. }
  151. if (ret) {
  152. puts("MAX8998 LDO setting error!\n");
  153. return -EINVAL;
  154. }
  155. return 0;
  156. }
  157. struct dwc2_plat_otg_data s5pc210_otg_data = {
  158. .phy_control = s5pc210_phy_control,
  159. .regs_phy = EXYNOS4_USBPHY_BASE,
  160. .regs_otg = EXYNOS4_USBOTG_BASE,
  161. .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
  162. .usb_flags = PHY0_SLEEP,
  163. };
  164. #endif
  165. int board_usb_init(int index, enum usb_init_type init)
  166. {
  167. debug("USB_udc_probe\n");
  168. return dwc2_udc_probe(&s5pc210_otg_data);
  169. }
  170. int exynos_early_init_f(void)
  171. {
  172. wdt_stop();
  173. return 0;
  174. }
  175. static int init_pmic_lcd(void)
  176. {
  177. struct udevice *dev;
  178. unsigned char val;
  179. int ret = 0;
  180. ret = pmic_get("max8998-pmic", &dev);
  181. if (ret) {
  182. puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
  183. return ret;
  184. }
  185. /* LDO7 1.8V */
  186. val = 0x02; /* (1800 - 1600) / 100; */
  187. ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
  188. /* LDO17 3.0V */
  189. val = 0xe; /* (3000 - 1600) / 100; */
  190. ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
  191. /* Disable unneeded regulators */
  192. /*
  193. * ONOFF1
  194. * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
  195. * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
  196. */
  197. val = 0xB9;
  198. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
  199. /* ONOFF2
  200. * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
  201. * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
  202. */
  203. val = 0x50;
  204. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
  205. /* ONOFF3
  206. * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
  207. * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
  208. */
  209. val = 0x00;
  210. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
  211. if (ret) {
  212. puts("LCD pmic initialisation error!\n");
  213. return -EINVAL;
  214. }
  215. return 0;
  216. }
  217. void exynos_cfg_lcd_gpio(void)
  218. {
  219. unsigned int i, f3_end = 4;
  220. for (i = 0; i < 8; i++) {
  221. /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
  222. gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
  223. gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
  224. gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
  225. /* pull-up/down disable */
  226. gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
  227. gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
  228. gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
  229. /* drive strength to max (24bit) */
  230. gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
  231. gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
  232. gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
  233. gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
  234. gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
  235. gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
  236. }
  237. for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
  238. /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
  239. gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
  240. /* pull-up/down disable */
  241. gpio_set_pull(i, S5P_GPIO_PULL_NONE);
  242. /* drive strength to max (24bit) */
  243. gpio_set_drv(i, S5P_GPIO_DRV_4X);
  244. gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
  245. }
  246. /* gpio pad configuration for LCD reset. */
  247. gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
  248. gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
  249. }
  250. int mipi_power(void)
  251. {
  252. return 0;
  253. }
  254. void exynos_reset_lcd(void)
  255. {
  256. gpio_set_value(EXYNOS4_GPIO_Y45, 1);
  257. udelay(10000);
  258. gpio_set_value(EXYNOS4_GPIO_Y45, 0);
  259. udelay(10000);
  260. gpio_set_value(EXYNOS4_GPIO_Y45, 1);
  261. udelay(100);
  262. }
  263. void exynos_lcd_power_on(void)
  264. {
  265. struct udevice *dev;
  266. int ret;
  267. u8 reg;
  268. ret = pmic_get("max8998-pmic", &dev);
  269. if (ret) {
  270. puts("Failed to get MAX8998!\n");
  271. return;
  272. }
  273. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
  274. reg |= MAX8998_LDO17;
  275. ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
  276. if (ret) {
  277. puts("MAX8998 LDO setting error\n");
  278. return;
  279. }
  280. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
  281. reg |= MAX8998_LDO7;
  282. ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
  283. if (ret) {
  284. puts("MAX8998 LDO setting error\n");
  285. return;
  286. }
  287. }
  288. void exynos_cfg_ldo(void)
  289. {
  290. ld9040_cfg_ldo();
  291. }
  292. void exynos_enable_ldo(unsigned int onoff)
  293. {
  294. ld9040_enable_ldo(onoff);
  295. }
  296. int exynos_init(void)
  297. {
  298. gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
  299. switch (get_hwrev()) {
  300. case 0:
  301. /*
  302. * Set the low to enable LDO_EN
  303. * But when you use the test board for eMMC booting
  304. * you should set it HIGH since it removes the inverter
  305. */
  306. /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
  307. gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
  308. gpio_direction_output(EXYNOS4_GPIO_E36, 0);
  309. break;
  310. default:
  311. /*
  312. * Default reset state is High and there's no inverter
  313. * But set it as HIGH to ensure
  314. */
  315. /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
  316. gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
  317. gpio_direction_output(EXYNOS4_GPIO_E13, 1);
  318. break;
  319. }
  320. check_hw_revision();
  321. printf("HW Revision:\t0x%x\n", board_rev);
  322. return 0;
  323. }
  324. #ifdef CONFIG_LCD
  325. void exynos_lcd_misc_init(vidinfo_t *vid)
  326. {
  327. #ifdef CONFIG_TIZEN
  328. get_tizen_logo_info(vid);
  329. #endif
  330. /* for LD9040. */
  331. vid->pclk_name = 1; /* MPLL */
  332. vid->sclk_div = 1;
  333. env_set("lcdinfo", "lcd=ld9040");
  334. }
  335. #endif