grpeach.c 972 B

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Renesas Electronics
  4. * Copyright (C) Chris Brandt
  5. */
  6. #include <common.h>
  7. #include <cpu_func.h>
  8. #include <init.h>
  9. #include <asm/global_data.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/sys_proto.h>
  12. #define RZA1_WDT_BASE 0xfcfe0000
  13. #define WTCSR 0x00
  14. #define WTCNT 0x02
  15. #define WRCSR 0x04
  16. DECLARE_GLOBAL_DATA_PTR;
  17. int board_init(void)
  18. {
  19. gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
  20. return 0;
  21. }
  22. int dram_init(void)
  23. {
  24. if (fdtdec_setup_mem_size_base() != 0)
  25. return -EINVAL;
  26. return 0;
  27. }
  28. int dram_init_banksize(void)
  29. {
  30. fdtdec_setup_memory_banksize();
  31. return 0;
  32. }
  33. void reset_cpu(void)
  34. {
  35. /* Dummy read (must read WRCSR:WOVF at least once before clearing) */
  36. readb(RZA1_WDT_BASE + WRCSR);
  37. writew(0xa500, RZA1_WDT_BASE + WRCSR);
  38. writew(0x5a5f, RZA1_WDT_BASE + WRCSR);
  39. writew(0x5a00, RZA1_WDT_BASE + WTCNT);
  40. writew(0xa578, RZA1_WDT_BASE + WTCSR);
  41. for (;;)
  42. asm volatile("wfi");
  43. }