seaboard.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2010,2011
  4. * NVIDIA Corporation <www.nvidia.com>
  5. */
  6. #include <common.h>
  7. #include <asm/io.h>
  8. #include <asm/mach-types.h>
  9. #include <asm/arch/tegra.h>
  10. #include <asm/arch-tegra/board.h>
  11. #include <asm/arch/clock.h>
  12. #include <asm/arch/funcmux.h>
  13. #include <asm/arch/gpio.h>
  14. #include <asm/arch/pinmux.h>
  15. #include <asm/gpio.h>
  16. /* TODO: Remove this code when the SPI switch is working */
  17. #if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA)
  18. void gpio_early_init_uart(void)
  19. {
  20. /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
  21. gpio_request(TEGRA_GPIO(I, 3), "uart_en");
  22. gpio_direction_output(TEGRA_GPIO(I, 3), 0);
  23. }
  24. #endif
  25. #ifdef CONFIG_MMC_SDHCI_TEGRA
  26. /*
  27. * Routine: pin_mux_mmc
  28. * Description: setup the pin muxes/tristate values for the SDMMC(s)
  29. */
  30. void pin_mux_mmc(void)
  31. {
  32. funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
  33. funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
  34. /* For power GPIO PI6 */
  35. pinmux_tristate_disable(PMUX_PINGRP_ATA);
  36. /* For CD GPIO PI5 */
  37. pinmux_tristate_disable(PMUX_PINGRP_ATC);
  38. }
  39. #endif
  40. void pin_mux_usb(void)
  41. {
  42. /* For USB0's GPIO PD0. For now, since we have no pinmux in fdt */
  43. pinmux_tristate_disable(PMUX_PINGRP_SLXK);
  44. /* For USB1's ULPI signals */
  45. funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
  46. pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
  47. pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
  48. /* USB1 PHY reset GPIO */
  49. pinmux_tristate_disable(PMUX_PINGRP_UAC);
  50. }