highbank.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2010-2011 Calxeda, Inc.
  4. */
  5. #include <common.h>
  6. #include <ahci.h>
  7. #include <cpu_func.h>
  8. #include <env.h>
  9. #include <fdt_support.h>
  10. #include <fdtdec.h>
  11. #include <init.h>
  12. #include <net.h>
  13. #include <scsi.h>
  14. #include <asm/global_data.h>
  15. #include <linux/sizes.h>
  16. #include <asm/io.h>
  17. #define HB_AHCI_BASE 0xffe08000
  18. #define HB_SCU_A9_PWR_STATUS 0xfff10008
  19. #define HB_SREG_A9_PWR_REQ 0xfff3cf00
  20. #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
  21. #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
  22. #define HB_SREG_A15_PWR_CTRL 0xfff3c200
  23. #define HB_PWR_SUSPEND 0
  24. #define HB_PWR_SOFT_RESET 1
  25. #define HB_PWR_HARD_RESET 2
  26. #define HB_PWR_SHUTDOWN 3
  27. #define PWRDOM_STAT_SATA 0x80000000
  28. #define PWRDOM_STAT_PCI 0x40000000
  29. #define PWRDOM_STAT_EMMC 0x20000000
  30. #define HB_SCU_A9_PWR_NORMAL 0
  31. #define HB_SCU_A9_PWR_DORMANT 2
  32. #define HB_SCU_A9_PWR_OFF 3
  33. DECLARE_GLOBAL_DATA_PTR;
  34. void cphy_disable_overrides(void);
  35. /*
  36. * Miscellaneous platform dependent initialisations
  37. */
  38. int board_init(void)
  39. {
  40. icache_enable();
  41. return 0;
  42. }
  43. #ifdef CONFIG_SCSI_AHCI_PLAT
  44. void scsi_init(void)
  45. {
  46. u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
  47. cphy_disable_overrides();
  48. if (reg & PWRDOM_STAT_SATA) {
  49. ahci_init((void __iomem *)HB_AHCI_BASE);
  50. scsi_scan(true);
  51. }
  52. }
  53. #endif
  54. #ifdef CONFIG_MISC_INIT_R
  55. int misc_init_r(void)
  56. {
  57. char envbuffer[16];
  58. u32 boot_choice;
  59. boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
  60. sprintf(envbuffer, "bootcmd%d", boot_choice);
  61. if (env_get(envbuffer)) {
  62. sprintf(envbuffer, "run bootcmd%d", boot_choice);
  63. env_set("bootcmd", envbuffer);
  64. } else
  65. env_set("bootcmd", "");
  66. return 0;
  67. }
  68. #endif
  69. int dram_init(void)
  70. {
  71. return fdtdec_setup_mem_size_base();
  72. }
  73. int dram_init_banksize(void)
  74. {
  75. return fdtdec_setup_memory_banksize();
  76. }
  77. #if defined(CONFIG_OF_BOARD_SETUP)
  78. int ft_board_setup(void *fdt, struct bd_info *bd)
  79. {
  80. static const char disabled[] = "disabled";
  81. u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
  82. if (!(reg & PWRDOM_STAT_SATA))
  83. do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
  84. disabled, sizeof(disabled), 1);
  85. if (!(reg & PWRDOM_STAT_EMMC))
  86. do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
  87. disabled, sizeof(disabled), 1);
  88. return 0;
  89. }
  90. #endif
  91. void *board_fdt_blob_setup(void)
  92. {
  93. /*
  94. * The ECME management processor loads the DTB from NOR flash
  95. * into DRAM (at 4KB), where it gets patched to contain the
  96. * detected memory size.
  97. */
  98. return (void *)0x1000;
  99. }
  100. static int is_highbank(void)
  101. {
  102. uint32_t midr;
  103. asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
  104. return (midr & 0xfff0) == 0xc090;
  105. }
  106. void reset_cpu(void)
  107. {
  108. writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
  109. if (is_highbank())
  110. writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
  111. else
  112. writel(0x1, HB_SREG_A15_PWR_CTRL);
  113. wfi();
  114. }
  115. /*
  116. * turn off the override before transferring control to Linux, since Linux
  117. * may not support spread spectrum.
  118. */
  119. void arch_preboot_os(void)
  120. {
  121. cphy_disable_overrides();
  122. }