gsc.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2021 Gateworks Corporation
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <hang.h>
  8. #include <hexdump.h>
  9. #include <i2c.h>
  10. #include <linux/delay.h>
  11. #include <dm/uclass.h>
  12. #include "gsc.h"
  13. DECLARE_GLOBAL_DATA_PTR;
  14. struct venice_board_info som_info;
  15. struct venice_board_info base_info;
  16. char venice_model[32];
  17. uint32_t venice_serial;
  18. /* return a mac address from EEPROM info */
  19. int gsc_getmac(int index, uint8_t *address)
  20. {
  21. int i, j;
  22. u32 maclow, machigh;
  23. u64 mac;
  24. j = 0;
  25. if (som_info.macno) {
  26. maclow = som_info.mac[5];
  27. maclow |= som_info.mac[4] << 8;
  28. maclow |= som_info.mac[3] << 16;
  29. maclow |= som_info.mac[2] << 24;
  30. machigh = som_info.mac[1];
  31. machigh |= som_info.mac[0] << 8;
  32. mac = machigh;
  33. mac <<= 32;
  34. mac |= maclow;
  35. for (i = 0; i < som_info.macno; i++, j++) {
  36. if (index == j)
  37. goto out;
  38. }
  39. }
  40. maclow = base_info.mac[5];
  41. maclow |= base_info.mac[4] << 8;
  42. maclow |= base_info.mac[3] << 16;
  43. maclow |= base_info.mac[2] << 24;
  44. machigh = base_info.mac[1];
  45. machigh |= base_info.mac[0] << 8;
  46. mac = machigh;
  47. mac <<= 32;
  48. mac |= maclow;
  49. for (i = 0; i < base_info.macno; i++, j++) {
  50. if (index == j)
  51. goto out;
  52. }
  53. return -EINVAL;
  54. out:
  55. mac += i;
  56. address[0] = (mac >> 40) & 0xff;
  57. address[1] = (mac >> 32) & 0xff;
  58. address[2] = (mac >> 24) & 0xff;
  59. address[3] = (mac >> 16) & 0xff;
  60. address[4] = (mac >> 8) & 0xff;
  61. address[5] = (mac >> 0) & 0xff;
  62. return 0;
  63. }
  64. /* System Controller registers */
  65. enum {
  66. GSC_SC_CTRL0 = 0,
  67. GSC_SC_CTRL1 = 1,
  68. GSC_SC_STATUS = 10,
  69. GSC_SC_FWCRC = 12,
  70. GSC_SC_FWVER = 14,
  71. GSC_SC_WP = 15,
  72. GSC_SC_RST_CAUSE = 16,
  73. GSC_SC_THERM_PROTECT = 19,
  74. };
  75. /* System Controller Control1 bits */
  76. enum {
  77. GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */
  78. GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */
  79. GSC_SC_CTRL1_BOOT_CHK = 6, /* 1 = enable alt boot check */
  80. GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */
  81. };
  82. /* System Controller Interrupt bits */
  83. enum {
  84. GSC_SC_IRQ_PB = 0, /* Pushbutton switch */
  85. GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */
  86. GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */
  87. GSC_SC_IRQ_GPIO = 4, /* GPIO change */
  88. GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */
  89. GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */
  90. GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */
  91. };
  92. /* System Controller WP bits */
  93. enum {
  94. GSC_SC_WP_ALL = 0, /* Write Protect All EEPROM regions */
  95. GSC_SC_WP_BOARDINFO = 1, /* Write Protect Board Info region */
  96. };
  97. /* System Controller Reset Cause */
  98. enum {
  99. GSC_SC_RST_CAUSE_VIN = 0,
  100. GSC_SC_RST_CAUSE_PB = 1,
  101. GSC_SC_RST_CAUSE_WDT = 2,
  102. GSC_SC_RST_CAUSE_CPU = 3,
  103. GSC_SC_RST_CAUSE_TEMP_LOCAL = 4,
  104. GSC_SC_RST_CAUSE_TEMP_REMOTE = 5,
  105. GSC_SC_RST_CAUSE_SLEEP = 6,
  106. GSC_SC_RST_CAUSE_BOOT_WDT = 7,
  107. GSC_SC_RST_CAUSE_BOOT_WDT_MAN = 8,
  108. GSC_SC_RST_CAUSE_SOFT_PWR = 9,
  109. GSC_SC_RST_CAUSE_MAX = 10,
  110. };
  111. #include <dm/device.h>
  112. static struct udevice *gsc_get_dev(int busno, int slave)
  113. {
  114. struct udevice *dev, *bus;
  115. int ret;
  116. ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus);
  117. if (ret) {
  118. printf("GSC : failed I2C%d probe: %d\n", busno, ret);
  119. return NULL;
  120. }
  121. ret = dm_i2c_probe(bus, slave, 0, &dev);
  122. if (ret)
  123. return NULL;
  124. return dev;
  125. }
  126. static int gsc_read_eeprom(int bus, int slave, int alen, struct venice_board_info *info)
  127. {
  128. int i;
  129. int chksum;
  130. unsigned char *buf = (unsigned char *)info;
  131. struct udevice *dev;
  132. int ret;
  133. /* probe device */
  134. dev = gsc_get_dev(bus, slave);
  135. if (!dev) {
  136. if (slave == GSC_EEPROM_ADDR)
  137. puts("ERROR: Failed to probe EEPROM\n");
  138. return -ENODEV;
  139. }
  140. /* read eeprom config section */
  141. memset(info, 0, sizeof(*info));
  142. ret = i2c_set_chip_offset_len(dev, alen);
  143. if (ret) {
  144. puts("EEPROM: Failed to set alen\n");
  145. return ret;
  146. }
  147. ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info));
  148. if (ret) {
  149. if (slave == GSC_EEPROM_ADDR)
  150. printf("EEPROM: Failed to read EEPROM\n");
  151. return ret;
  152. }
  153. /* validate checksum */
  154. for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
  155. chksum += buf[i];
  156. if ((info->chksum[0] != chksum >> 8) ||
  157. (info->chksum[1] != (chksum & 0xff))) {
  158. printf("EEPROM: I2C%d@0x%02x: Invalid Checksum\n", bus, slave);
  159. print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
  160. memset(info, 0, sizeof(*info));
  161. return -EINVAL;
  162. }
  163. /* sanity check valid model */
  164. if (info->model[0] != 'G' || info->model[1] != 'W') {
  165. printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave);
  166. print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
  167. memset(info, 0, sizeof(*info));
  168. return -EINVAL;
  169. }
  170. return 0;
  171. }
  172. static const char *gsc_get_rst_cause(struct udevice *dev)
  173. {
  174. static char str[64];
  175. static const char * const names[] = {
  176. "VIN",
  177. "PB",
  178. "WDT",
  179. "CPU",
  180. "TEMP_L",
  181. "TEMP_R",
  182. "SLEEP",
  183. "BOOT_WDT1",
  184. "BOOT_WDT2",
  185. "SOFT_PWR",
  186. };
  187. unsigned char reg;
  188. /* reset cause */
  189. str[0] = 0;
  190. if (!dm_i2c_read(dev, GSC_SC_RST_CAUSE, &reg, 1)) {
  191. if (reg < ARRAY_SIZE(names))
  192. sprintf(str, "%s", names[reg]);
  193. else
  194. sprintf(str, "0x%02x", reg);
  195. }
  196. /* thermal protection */
  197. if (!dm_i2c_read(dev, GSC_SC_THERM_PROTECT, &reg, 1)) {
  198. strcat(str, " Thermal Protection ");
  199. if (reg & BIT(0))
  200. strcat(str, "Enabled");
  201. else
  202. strcat(str, "Disabled");
  203. }
  204. return str;
  205. }
  206. /* display hardware monitor ADC channels */
  207. int gsc_hwmon(void)
  208. {
  209. const void *fdt = gd->fdt_blob;
  210. struct udevice *dev;
  211. int node, reg, mode, len, val, offset;
  212. const char *label;
  213. u8 buf[2];
  214. int ret;
  215. node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
  216. if (node <= 0)
  217. return node;
  218. /* probe device */
  219. dev = gsc_get_dev(GSC_BUSNO, GSC_HWMON_ADDR);
  220. if (!dev) {
  221. puts("ERROR: Failed to probe GSC HWMON\n");
  222. return -ENODEV;
  223. }
  224. /* iterate over hwmon nodes */
  225. node = fdt_first_subnode(fdt, node);
  226. while (node > 0) {
  227. reg = fdtdec_get_int(fdt, node, "reg", -1);
  228. mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
  229. offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0);
  230. label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
  231. if ((reg == -1) || (mode == -1) || !label)
  232. printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL));
  233. memset(buf, 0, sizeof(buf));
  234. ret = dm_i2c_read(dev, reg, buf, sizeof(buf));
  235. if (ret) {
  236. printf("i2c error: %d\n", ret);
  237. continue;
  238. }
  239. val = buf[0] | buf[1] << 8;
  240. if (val >= 0) {
  241. const u32 *div;
  242. int r[2];
  243. switch (mode) {
  244. case 0: /* temperature (C*10) */
  245. if (val > 0x8000)
  246. val -= 0xffff;
  247. printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10));
  248. break;
  249. case 1: /* prescaled voltage */
  250. if (val != 0xffff)
  251. printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
  252. break;
  253. case 2: /* scaled based on ref volt and resolution */
  254. val *= 2500;
  255. val /= 1 << 12;
  256. /* apply pre-scaler voltage divider */
  257. div = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len);
  258. if (div && (len == sizeof(uint32_t) * 2)) {
  259. r[0] = fdt32_to_cpu(div[0]);
  260. r[1] = fdt32_to_cpu(div[1]);
  261. if (r[0] && r[1]) {
  262. val *= (r[0] + r[1]);
  263. val /= r[1];
  264. }
  265. }
  266. /* adjust by offset */
  267. val += (offset / 1000);
  268. printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
  269. break;
  270. }
  271. }
  272. node = fdt_next_subnode(fdt, node);
  273. }
  274. return 0;
  275. }
  276. /* determine BOM revision from model */
  277. int get_bom_rev(const char *str)
  278. {
  279. int rev_bom = 0;
  280. int i;
  281. for (i = strlen(str) - 1; i > 0; i--) {
  282. if (str[i] == '-')
  283. break;
  284. if (str[i] >= '1' && str[i] <= '9') {
  285. rev_bom = str[i] - '0';
  286. break;
  287. }
  288. }
  289. return rev_bom;
  290. }
  291. /* determine PCB revision from model */
  292. char get_pcb_rev(const char *str)
  293. {
  294. char rev_pcb = 'A';
  295. int i;
  296. for (i = strlen(str) - 1; i > 0; i--) {
  297. if (str[i] == '-')
  298. break;
  299. if (str[i] >= 'A') {
  300. rev_pcb = str[i];
  301. break;
  302. }
  303. }
  304. return rev_pcb;
  305. }
  306. /*
  307. * get dt name based on model and detail level:
  308. *
  309. * For boards that are a combination of a SoM plus a Baseboard:
  310. * Venice SoM part numbers are GW70xx where xx is:
  311. * 7000-7019: same PCB with som dt of '0x'
  312. * 7020-7039: same PCB with som dt of '2x'
  313. * 7040-7059: same PCB with som dt of '4x'
  314. * 7060-7079: same PCB with som dt of '6x'
  315. * 7080-7099: same PCB with som dt of '8x'
  316. * Venice Baseboard part numbers are GW7xxx where xxx is:
  317. * 7100-7199: same PCB with base dt of '71xx'
  318. * 7200-7299: same PCB with base dt of '72xx'
  319. * 7300-7399: same PCB with base dt of '73xx'
  320. * 7400-7499: same PCB with base dt of '74xx'
  321. * 7500-7599: same PCB with base dt of '75xx'
  322. * 7600-7699: same PCB with base dt of '76xx'
  323. * 7700-7799: same PCB with base dt of '77xx'
  324. * 7800-7899: same PCB with base dt of '78xx'
  325. * DT name is comprised of:
  326. * gw<base dt>-<som dt>-[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev]
  327. *
  328. * For board models from 7900-7999 each PCB is unique with its own dt:
  329. * DT name is comprised:
  330. * gw<model>-[pcb-rev][bom-rev]
  331. *
  332. */
  333. #define snprintfcat(dest, sz, fmt, ...) \
  334. snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__)
  335. const char *gsc_get_dtb_name(int level, char *buf, int sz)
  336. {
  337. const char *pre = "imx8mm-venice-gw";
  338. int model, rev_pcb, rev_bom;
  339. model = ((som_info.model[2] - '0') * 1000)
  340. + ((som_info.model[3] - '0') * 100)
  341. + ((som_info.model[4] - '0') * 10)
  342. + (som_info.model[5] - '0');
  343. rev_pcb = tolower(get_pcb_rev(som_info.model));
  344. rev_bom = get_bom_rev(som_info.model);
  345. /* som + baseboard*/
  346. if (base_info.model[0]) {
  347. /* baseboard id: 7100-7199->71; 7200-7299->72; etc */
  348. int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0');
  349. /* som id: 7000-7019->1; 7020-7039->2; etc */
  350. int som = ((model % 100) / 20) * 2;
  351. int rev_base_pcb = tolower(get_pcb_rev(base_info.model));
  352. int rev_base_bom = get_bom_rev(base_info.model);
  353. snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som);
  354. switch (level) {
  355. case 0: /* full model (ie gw73xx-0x-a1a1) */
  356. if (rev_base_bom)
  357. snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
  358. else
  359. snprintfcat(buf, sz, "-%c", rev_base_pcb);
  360. if (rev_bom)
  361. snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
  362. else
  363. snprintfcat(buf, sz, "%c", rev_pcb);
  364. break;
  365. case 1: /* don't care about SoM revision */
  366. if (rev_base_bom)
  367. snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
  368. else
  369. snprintfcat(buf, sz, "-%c", rev_base_pcb);
  370. snprintfcat(buf, sz, "xx");
  371. break;
  372. case 2: /* don't care about baseboard revision */
  373. snprintfcat(buf, sz, "-xx");
  374. if (rev_bom)
  375. snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
  376. else
  377. snprintfcat(buf, sz, "%c", rev_pcb);
  378. break;
  379. case 3: /* don't care about SoM/baseboard revision */
  380. break;
  381. default:
  382. return NULL;
  383. }
  384. } else {
  385. snprintf(buf, sz, "%s%04d", pre, model);
  386. switch (level) {
  387. case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */
  388. if (rev_bom)
  389. snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom);
  390. else
  391. snprintfcat(buf, sz, "-%c", rev_pcb);
  392. break;
  393. case 1: /* don't care about BOM revision */
  394. snprintfcat(buf, sz, "-%c", rev_pcb);
  395. break;
  396. case 2: /* don't care about PCB or BOM revision */
  397. break;
  398. default:
  399. return NULL;
  400. }
  401. }
  402. return buf;
  403. }
  404. static int gsc_read(void)
  405. {
  406. char rev_pcb;
  407. int rev_bom;
  408. int ret;
  409. ret = gsc_read_eeprom(GSC_BUSNO, GSC_EEPROM_ADDR, 1, &som_info);
  410. if (ret) {
  411. memset(&som_info, 0, sizeof(som_info));
  412. return ret;
  413. }
  414. /* read optional baseboard EEPROM */
  415. gsc_read_eeprom(BASEBOARD_EEPROM_BUSNO, BASEBOARD_EEPROM_ADDR,
  416. 2, &base_info);
  417. /* create model strings */
  418. if (base_info.model[0]) {
  419. sprintf(venice_model, "GW%c%c%c%c-%c%c-",
  420. som_info.model[2], /* family */
  421. base_info.model[3], /* baseboard */
  422. base_info.model[4], base_info.model[5], /* subload of baseboard */
  423. som_info.model[4], som_info.model[5]); /* last 2digits of SOM */
  424. /* baseboard revision */
  425. rev_pcb = get_pcb_rev(base_info.model);
  426. rev_bom = get_bom_rev(base_info.model);
  427. if (rev_bom)
  428. sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
  429. else
  430. sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
  431. /* som revision */
  432. rev_pcb = get_pcb_rev(som_info.model);
  433. rev_bom = get_bom_rev(som_info.model);
  434. if (rev_bom)
  435. sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
  436. else
  437. sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
  438. } else {
  439. strcpy(venice_model, som_info.model);
  440. }
  441. venice_serial = som_info.serial;
  442. return 0;
  443. }
  444. static int gsc_info(int verbose)
  445. {
  446. struct udevice *dev;
  447. unsigned char buf[16];
  448. printf("Model : %s\n", venice_model);
  449. printf("Serial : %d\n", som_info.serial);
  450. printf("MFGDate : %02x-%02x-%02x%02x\n",
  451. som_info.mfgdate[0], som_info.mfgdate[1],
  452. som_info.mfgdate[2], som_info.mfgdate[3]);
  453. if (base_info.model[0] && verbose > 1) {
  454. printf("SOM : %s %d %02x-%02x-%02x%02x\n",
  455. som_info.model, som_info.serial,
  456. som_info.mfgdate[0], som_info.mfgdate[1],
  457. som_info.mfgdate[2], som_info.mfgdate[3]);
  458. printf("BASE : %s %d %02x-%02x-%02x%02x\n",
  459. base_info.model, base_info.serial,
  460. base_info.mfgdate[0], base_info.mfgdate[1],
  461. base_info.mfgdate[2], base_info.mfgdate[3]);
  462. }
  463. /* Display RTC */
  464. puts("RTC : ");
  465. dev = gsc_get_dev(GSC_BUSNO, GSC_RTC_ADDR);
  466. if (!dev) {
  467. puts("Failed to probe GSC RTC\n");
  468. } else {
  469. dm_i2c_read(dev, 0, buf, 6);
  470. printf("%d\n", buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
  471. }
  472. return 0;
  473. }
  474. int gsc_init(int quiet)
  475. {
  476. unsigned char buf[16];
  477. struct udevice *dev;
  478. int ret;
  479. /*
  480. * On a board with a missing/depleted backup battery for GSC, the
  481. * board may be ready to probe the GSC before its firmware is
  482. * running. We will wait here indefinately for the GSC/EEPROM.
  483. */
  484. while (1) {
  485. /* probe device */
  486. dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
  487. if (dev)
  488. break;
  489. mdelay(1);
  490. }
  491. ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
  492. if (ret) {
  493. puts("ERROR: Failed reading GSC\n");
  494. return ret;
  495. }
  496. gsc_read();
  497. /* banner */
  498. if (!quiet) {
  499. printf("GSC : v%d 0x%04x", buf[GSC_SC_FWVER],
  500. buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8);
  501. printf(" RST:%s", gsc_get_rst_cause(dev));
  502. printf("\n");
  503. gsc_info(1);
  504. }
  505. if (ret)
  506. hang();
  507. return ((16 << som_info.sdram_size) / 1024);
  508. }
  509. const char *gsc_get_model(void)
  510. {
  511. return venice_model;
  512. }
  513. uint32_t gsc_get_serial(void)
  514. {
  515. return venice_serial;
  516. }
  517. #if !(IS_ENABLED(CONFIG_SPL_BUILD))
  518. static int gsc_sleep(unsigned long secs)
  519. {
  520. unsigned char reg;
  521. struct udevice *dev;
  522. int ret;
  523. /* probe device */
  524. dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
  525. if (!dev)
  526. return -ENODEV;
  527. printf("GSC Sleeping for %ld seconds\n", secs);
  528. reg = (secs >> 24) & 0xff;
  529. ret = dm_i2c_write(dev, 9, &reg, 1);
  530. if (ret)
  531. goto err;
  532. reg = (secs >> 16) & 0xff;
  533. ret = dm_i2c_write(dev, 8, &reg, 1);
  534. if (ret)
  535. goto err;
  536. reg = (secs >> 8) & 0xff;
  537. ret = dm_i2c_write(dev, 7, &reg, 1);
  538. if (ret)
  539. goto err;
  540. reg = secs & 0xff;
  541. ret = dm_i2c_write(dev, 6, &reg, 1);
  542. if (ret)
  543. goto err;
  544. ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
  545. if (ret)
  546. goto err;
  547. reg |= (1 << 2);
  548. ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
  549. if (ret)
  550. goto err;
  551. reg &= ~(1 << 2);
  552. reg |= 0x3;
  553. ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
  554. if (ret)
  555. goto err;
  556. return 0;
  557. err:
  558. printf("i2c error\n");
  559. return ret;
  560. }
  561. static int gsc_boot_wd_disable(void)
  562. {
  563. u8 reg;
  564. struct udevice *dev;
  565. int ret;
  566. /* probe device */
  567. dev = gsc_get_dev(GSC_BUSNO, GSC_SC_ADDR);
  568. if (!dev)
  569. return -ENODEV;
  570. ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
  571. if (ret)
  572. goto err;
  573. reg |= (1 << GSC_SC_CTRL1_WDDIS);
  574. reg &= ~(1 << GSC_SC_CTRL1_BOOT_CHK);
  575. ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
  576. if (ret)
  577. goto err;
  578. puts("GSC : boot watchdog disabled\n");
  579. return 0;
  580. err:
  581. printf("i2c error");
  582. return ret;
  583. }
  584. static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
  585. {
  586. if (argc < 2)
  587. return gsc_info(2);
  588. if (strcasecmp(argv[1], "sleep") == 0) {
  589. if (argc < 3)
  590. return CMD_RET_USAGE;
  591. if (!gsc_sleep(dectoul(argv[2], NULL)))
  592. return CMD_RET_SUCCESS;
  593. } else if (strcasecmp(argv[1], "hwmon") == 0) {
  594. if (!gsc_hwmon())
  595. return CMD_RET_SUCCESS;
  596. } else if (strcasecmp(argv[1], "wd-disable") == 0) {
  597. if (!gsc_boot_wd_disable())
  598. return CMD_RET_SUCCESS;
  599. }
  600. return CMD_RET_USAGE;
  601. }
  602. U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller",
  603. "[sleep <secs>]|[hwmon]|[wd-disable]\n");
  604. #endif