ddr.h 1.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2017 NXP
  4. */
  5. #ifndef __LS1088A_DDR_H__
  6. #define __LS1088A_DDR_H__
  7. struct board_specific_parameters {
  8. u32 n_ranks;
  9. u32 datarate_mhz_high;
  10. u32 rank_gb;
  11. u32 clk_adjust;
  12. u32 wrlvl_start;
  13. u32 wrlvl_ctl_2;
  14. u32 wrlvl_ctl_3;
  15. };
  16. /*
  17. * These tables contain all valid speeds we want to override with board
  18. * specific parameters. datarate_mhz_high values need to be in ascending order
  19. * for each n_ranks group.
  20. */
  21. static const struct board_specific_parameters udimm0[] = {
  22. /*
  23. * memory controller 0
  24. * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
  25. * ranks| mhz| GB |adjst| start | ctl2 | ctl3
  26. */
  27. #if defined(CONFIG_TARGET_LS1088ARDB)
  28. {2, 1666, 0, 8, 8, 0x090A0B0E, 0x0F10110D,},
  29. {2, 1900, 0, 8, 9, 0x0A0B0C10, 0x1112140E,},
  30. {2, 2300, 0, 8, 9, 0x0A0C0E11, 0x1214160F,},
  31. {}
  32. #elif defined(CONFIG_TARGET_LS1088AQDS)
  33. {2, 1666, 0, 8, 8, 0x0A0A0C0E, 0x0F10110C,},
  34. {2, 1900, 0, 8, 9, 0x0A0B0C10, 0x1112140E,},
  35. {2, 2300, 0, 4, 9, 0x0A0C0D11, 0x1214150E,},
  36. {}
  37. #endif
  38. };
  39. static const struct board_specific_parameters *udimms[] = {
  40. udimm0,
  41. };
  42. #endif