cpld.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2016 Freescale Semiconductor
  4. *
  5. * Freescale LS1046ARDB board-specific CPLD controlling supports.
  6. */
  7. #include <common.h>
  8. #include <command.h>
  9. #include <asm/io.h>
  10. #include "cpld.h"
  11. u8 cpld_read(unsigned int reg)
  12. {
  13. void *p = (void *)CONFIG_SYS_CPLD_BASE;
  14. return in_8(p + reg);
  15. }
  16. void cpld_write(unsigned int reg, u8 value)
  17. {
  18. void *p = (void *)CONFIG_SYS_CPLD_BASE;
  19. out_8(p + reg, value);
  20. }
  21. /* Set the boot bank to the alternate bank */
  22. void cpld_set_altbank(void)
  23. {
  24. u16 reg = CPLD_CFG_RCW_SRC_QSPI;
  25. u8 reg4 = CPLD_READ(soft_mux_on);
  26. u8 reg5 = (u8)(reg >> 1);
  27. u8 reg6 = (u8)(reg & 1);
  28. u8 reg7 = CPLD_READ(vbank);
  29. cpld_rev_bit(&reg5);
  30. CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
  31. CPLD_WRITE(cfg_rcw_src1, reg5);
  32. CPLD_WRITE(cfg_rcw_src2, reg6);
  33. reg7 = (reg7 & ~CPLD_BANK_SEL_MASK) | CPLD_BANK_SEL_ALTBANK;
  34. CPLD_WRITE(vbank, reg7);
  35. CPLD_WRITE(system_rst, 1);
  36. }
  37. /* Set the boot bank to the default bank */
  38. void cpld_set_defbank(void)
  39. {
  40. u16 reg = CPLD_CFG_RCW_SRC_QSPI;
  41. u8 reg4 = CPLD_READ(soft_mux_on);
  42. u8 reg5 = (u8)(reg >> 1);
  43. u8 reg6 = (u8)(reg & 1);
  44. cpld_rev_bit(&reg5);
  45. CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
  46. CPLD_WRITE(cfg_rcw_src1, reg5);
  47. CPLD_WRITE(cfg_rcw_src2, reg6);
  48. CPLD_WRITE(vbank, 0);
  49. CPLD_WRITE(system_rst, 1);
  50. }
  51. void cpld_set_sd(void)
  52. {
  53. u16 reg = CPLD_CFG_RCW_SRC_SD;
  54. u8 reg5 = (u8)(reg >> 1);
  55. u8 reg6 = (u8)(reg & 1);
  56. cpld_rev_bit(&reg5);
  57. CPLD_WRITE(soft_mux_on, 1);
  58. CPLD_WRITE(cfg_rcw_src1, reg5);
  59. CPLD_WRITE(cfg_rcw_src2, reg6);
  60. CPLD_WRITE(system_rst, 1);
  61. }
  62. void cpld_select_core_volt(bool en_0v9)
  63. {
  64. u8 reg17 = en_0v9;
  65. CPLD_WRITE(vdd_en, 1);
  66. CPLD_WRITE(vdd_sel, reg17);
  67. }
  68. #ifdef DEBUG
  69. static void cpld_dump_regs(void)
  70. {
  71. printf("cpld_ver = %x\n", CPLD_READ(cpld_ver));
  72. printf("cpld_ver_sub = %x\n", CPLD_READ(cpld_ver_sub));
  73. printf("pcba_ver = %x\n", CPLD_READ(pcba_ver));
  74. printf("soft_mux_on = %x\n", CPLD_READ(soft_mux_on));
  75. printf("cfg_rcw_src1 = %x\n", CPLD_READ(cfg_rcw_src1));
  76. printf("cfg_rcw_src2 = %x\n", CPLD_READ(cfg_rcw_src2));
  77. printf("vbank = %x\n", CPLD_READ(vbank));
  78. printf("sysclk_sel = %x\n", CPLD_READ(sysclk_sel));
  79. printf("uart_sel = %x\n", CPLD_READ(uart_sel));
  80. printf("sd1refclk_sel = %x\n", CPLD_READ(sd1refclk_sel));
  81. printf("rgmii_1588_sel = %x\n", CPLD_READ(rgmii_1588_sel));
  82. printf("1588_clk_sel = %x\n", CPLD_READ(reg_1588_clk_sel));
  83. printf("status_led = %x\n", CPLD_READ(status_led));
  84. printf("sd_emmc = %x\n", CPLD_READ(sd_emmc));
  85. printf("vdd_en = %x\n", CPLD_READ(vdd_en));
  86. printf("vdd_sel = %x\n", CPLD_READ(vdd_sel));
  87. putc('\n');
  88. }
  89. #endif
  90. void cpld_rev_bit(unsigned char *value)
  91. {
  92. u8 rev_val, val;
  93. int i;
  94. val = *value;
  95. rev_val = val & 1;
  96. for (i = 1; i <= 7; i++) {
  97. val >>= 1;
  98. rev_val <<= 1;
  99. rev_val |= val & 1;
  100. }
  101. *value = rev_val;
  102. }
  103. int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  104. {
  105. int rc = 0;
  106. if (argc <= 1)
  107. return cmd_usage(cmdtp);
  108. if (strcmp(argv[1], "reset") == 0) {
  109. if (strcmp(argv[2], "altbank") == 0)
  110. cpld_set_altbank();
  111. else if (strcmp(argv[2], "sd") == 0)
  112. cpld_set_sd();
  113. else
  114. cpld_set_defbank();
  115. #ifdef DEBUG
  116. } else if (strcmp(argv[1], "dump") == 0) {
  117. cpld_dump_regs();
  118. #endif
  119. } else {
  120. rc = cmd_usage(cmdtp);
  121. }
  122. return rc;
  123. }
  124. U_BOOT_CMD(
  125. cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
  126. "Reset the board or alternate bank",
  127. "reset: reset to default bank\n"
  128. "cpld reset altbank: reset to alternate bank\n"
  129. "cpld reset sd: reset to boot from SD card\n"
  130. #ifdef DEBUG
  131. "cpld dump - display the CPLD registers\n"
  132. #endif
  133. );