dh_imx6.c 4.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * DHCOM DH-iMX6 PDK board support
  4. *
  5. * Copyright (C) 2017 Marek Vasut <marex@denx.de>
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <eeprom.h>
  10. #include <image.h>
  11. #include <init.h>
  12. #include <net.h>
  13. #include <asm/global_data.h>
  14. #include <dm/device-internal.h>
  15. #include <asm/arch/clock.h>
  16. #include <asm/arch/crm_regs.h>
  17. #include <asm/arch/imx-regs.h>
  18. #include <asm/arch/iomux.h>
  19. #include <asm/arch/mx6-pins.h>
  20. #include <asm/arch/sys_proto.h>
  21. #include <asm/gpio.h>
  22. #include <asm/io.h>
  23. #include <asm/mach-imx/boot_mode.h>
  24. #include <asm/mach-imx/iomux-v3.h>
  25. #include <asm/mach-imx/sata.h>
  26. #include <ahci.h>
  27. #include <dwc_ahsata.h>
  28. #include <env.h>
  29. #include <errno.h>
  30. #include <fsl_esdhc_imx.h>
  31. #include <fuse.h>
  32. #include <i2c_eeprom.h>
  33. #include <mmc.h>
  34. #include <usb.h>
  35. #include <linux/delay.h>
  36. #include <usb/ehci-ci.h>
  37. DECLARE_GLOBAL_DATA_PTR;
  38. int dram_init(void)
  39. {
  40. gd->ram_size = imx_ddr_size();
  41. return 0;
  42. }
  43. /*
  44. * Do not overwrite the console
  45. * Use always serial for U-Boot console
  46. */
  47. int overwrite_console(void)
  48. {
  49. return 1;
  50. }
  51. static int setup_fec_clock(void)
  52. {
  53. struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
  54. /* set gpr1[21] to select anatop clock */
  55. clrsetbits_le32(&iomuxc_regs->gpr[1], 0x1 << 21, 0x1 << 21);
  56. return enable_fec_anatop_clock(0, ENET_50MHZ);
  57. }
  58. #ifdef CONFIG_USB_EHCI_MX6
  59. static void setup_usb(void)
  60. {
  61. /*
  62. * Set daisy chain for otg_pin_id on MX6Q.
  63. * For MX6DL, this bit is reserved.
  64. */
  65. imx_iomux_set_gpr_register(1, 13, 1, 0);
  66. }
  67. int board_usb_phy_mode(int port)
  68. {
  69. if (port == 1)
  70. return USB_INIT_HOST;
  71. else
  72. return USB_INIT_DEVICE;
  73. }
  74. #endif
  75. static int setup_dhcom_mac_from_fuse(void)
  76. {
  77. struct udevice *dev;
  78. ofnode eeprom;
  79. unsigned char enetaddr[6];
  80. int ret;
  81. ret = eth_env_get_enetaddr("ethaddr", enetaddr);
  82. if (ret) /* ethaddr is already set */
  83. return 0;
  84. imx_get_mac_from_fuse(0, enetaddr);
  85. if (is_valid_ethaddr(enetaddr)) {
  86. eth_env_set_enetaddr("ethaddr", enetaddr);
  87. return 0;
  88. }
  89. eeprom = ofnode_path("/soc/aips-bus@2100000/i2c@21a8000/eeprom@50");
  90. if (!ofnode_valid(eeprom)) {
  91. printf("Invalid hardware path to EEPROM!\n");
  92. return -ENODEV;
  93. }
  94. ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
  95. if (ret) {
  96. printf("Cannot find EEPROM!\n");
  97. return ret;
  98. }
  99. ret = i2c_eeprom_read(dev, 0xfa, enetaddr, 0x6);
  100. if (ret) {
  101. printf("Error reading configuration EEPROM!\n");
  102. return ret;
  103. }
  104. if (is_valid_ethaddr(enetaddr))
  105. eth_env_set_enetaddr("ethaddr", enetaddr);
  106. return 0;
  107. }
  108. int board_early_init_f(void)
  109. {
  110. #ifdef CONFIG_USB_EHCI_MX6
  111. setup_usb();
  112. #endif
  113. return 0;
  114. }
  115. int board_init(void)
  116. {
  117. struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
  118. /* address of boot parameters */
  119. gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  120. /* Enable eim_slow clocks */
  121. setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET);
  122. setup_fec_clock();
  123. return 0;
  124. }
  125. #ifdef CONFIG_CMD_BMODE
  126. static const struct boot_mode board_boot_modes[] = {
  127. /* 4 bit bus width */
  128. {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
  129. {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
  130. /* 8 bit bus width */
  131. {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)},
  132. {NULL, 0},
  133. };
  134. #endif
  135. #define HW_CODE_BIT_0 IMX_GPIO_NR(2, 19)
  136. #define HW_CODE_BIT_1 IMX_GPIO_NR(6, 6)
  137. #define HW_CODE_BIT_2 IMX_GPIO_NR(2, 16)
  138. static int board_get_hwcode(void)
  139. {
  140. int hw_code;
  141. gpio_request(HW_CODE_BIT_0, "HW-code-bit-0");
  142. gpio_request(HW_CODE_BIT_1, "HW-code-bit-1");
  143. gpio_request(HW_CODE_BIT_2, "HW-code-bit-2");
  144. gpio_direction_input(HW_CODE_BIT_0);
  145. gpio_direction_input(HW_CODE_BIT_1);
  146. gpio_direction_input(HW_CODE_BIT_2);
  147. /* HW 100 + HW 200 = 00b; HW 300 = 01b */
  148. hw_code = ((gpio_get_value(HW_CODE_BIT_2) << 2) |
  149. (gpio_get_value(HW_CODE_BIT_1) << 1) |
  150. gpio_get_value(HW_CODE_BIT_0)) + 2;
  151. return hw_code;
  152. }
  153. int board_late_init(void)
  154. {
  155. u32 hw_code;
  156. char buf[16];
  157. setup_dhcom_mac_from_fuse();
  158. hw_code = board_get_hwcode();
  159. switch (get_cpu_type()) {
  160. case MXC_CPU_MX6SOLO:
  161. snprintf(buf, sizeof(buf), "imx6s-dhcom%1d", hw_code);
  162. break;
  163. case MXC_CPU_MX6DL:
  164. snprintf(buf, sizeof(buf), "imx6dl-dhcom%1d", hw_code);
  165. break;
  166. case MXC_CPU_MX6D:
  167. snprintf(buf, sizeof(buf), "imx6d-dhcom%1d", hw_code);
  168. break;
  169. case MXC_CPU_MX6Q:
  170. snprintf(buf, sizeof(buf), "imx6q-dhcom%1d", hw_code);
  171. break;
  172. default:
  173. snprintf(buf, sizeof(buf), "UNKNOWN%1d", hw_code);
  174. break;
  175. }
  176. env_set("dhcom", buf);
  177. #ifdef CONFIG_CMD_BMODE
  178. add_board_boot_modes(board_boot_modes);
  179. #endif
  180. return 0;
  181. }
  182. int checkboard(void)
  183. {
  184. puts("Board: DHCOM i.MX6\n");
  185. return 0;
  186. }
  187. #ifdef CONFIG_MULTI_DTB_FIT
  188. int board_fit_config_name_match(const char *name)
  189. {
  190. if (is_mx6dq()) {
  191. if (!strcmp(name, "imx6q-dhcom-pdk2"))
  192. return 0;
  193. } else if (is_mx6sdl()) {
  194. if (!strcmp(name, "imx6dl-dhcom-pdk2"))
  195. return 0;
  196. }
  197. return -1;
  198. }
  199. #endif