omap3_smc911x.c 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
  4. *
  5. * Authors: Igor Grinberg <grinberg@compulab.co.il>
  6. */
  7. #include <common.h>
  8. #include <netdev.h>
  9. #include <linux/delay.h>
  10. #include <asm/io.h>
  11. #include <linux/errno.h>
  12. #include <asm/arch/cpu.h>
  13. #include <asm/arch/mem.h>
  14. #include <asm/arch/sys_proto.h>
  15. #include <asm/gpio.h>
  16. #include "common.h"
  17. static u32 cl_omap3_smc911x_gpmc_net_config[GPMC_MAX_REG] = {
  18. NET_GPMC_CONFIG1,
  19. NET_GPMC_CONFIG2,
  20. NET_GPMC_CONFIG3,
  21. NET_GPMC_CONFIG4,
  22. NET_GPMC_CONFIG5,
  23. NET_GPMC_CONFIG6,
  24. 0
  25. };
  26. static void cl_omap3_smc911x_setup_net_chip_gmpc(int cs, u32 base_addr)
  27. {
  28. struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
  29. enable_gpmc_cs_config(cl_omap3_smc911x_gpmc_net_config,
  30. &gpmc_cfg->cs[cs], base_addr, GPMC_SIZE_16M);
  31. /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
  32. writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
  33. /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
  34. writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
  35. /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
  36. writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
  37. &ctrl_base->gpmc_nadv_ale);
  38. }
  39. #ifdef CONFIG_OMAP_GPIO
  40. static int cl_omap3_smc911x_reset_net_chip(int gpio)
  41. {
  42. int err;
  43. if (!gpio_is_valid(gpio))
  44. return -EINVAL;
  45. err = gpio_request(gpio, "eth rst");
  46. if (err)
  47. return err;
  48. /* Set gpio as output and send a pulse */
  49. gpio_direction_output(gpio, 1);
  50. udelay(1);
  51. gpio_set_value(gpio, 0);
  52. mdelay(40);
  53. gpio_set_value(gpio, 1);
  54. mdelay(1);
  55. return 0;
  56. }
  57. #else /* !CONFIG_OMAP_GPIO */
  58. static inline int cl_omap3_smc911x_reset_net_chip(int gpio) { return 0; }
  59. #endif /* CONFIG_OMAP_GPIO */
  60. int cl_omap3_smc911x_init(int id, int cs, u32 base_addr,
  61. int (*reset)(int), int rst_gpio)
  62. {
  63. int ret;
  64. cl_omap3_smc911x_setup_net_chip_gmpc(cs, base_addr);
  65. if (reset)
  66. reset(rst_gpio);
  67. else
  68. cl_omap3_smc911x_reset_net_chip(rst_gpio);
  69. ret = smc911x_initialize(id, base_addr);
  70. if (ret > 0)
  71. return ret;
  72. printf("Failed initializing SMC911x! ");
  73. return 0;
  74. }