udiv_qrnnd.S 1.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
  3. 2004, 2005, 2006
  4. Free Software Foundation, Inc.
  5. */
  6. !! libgcc routines for the Renesas / SuperH SH CPUs.
  7. !! Contributed by Steve Chamberlain.
  8. !! sac@cygnus.com
  9. !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
  10. !! recoded in assembly by Toshiyasu Morita
  11. !! tm@netcom.com
  12. /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
  13. ELF local label prefixes by J"orn Rennecke
  14. amylaar@cygnus.com */
  15. /* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */
  16. /* n1 < d, but n1 might be larger than d1. */
  17. .global __udiv_qrnnd_16
  18. .balign 8
  19. __udiv_qrnnd_16:
  20. div0u
  21. cmp/hi r6,r0
  22. bt .Lots
  23. .rept 16
  24. div1 r6,r0
  25. .endr
  26. extu.w r0,r1
  27. bt 0f
  28. add r6,r0
  29. 0: rotcl r1
  30. mulu.w r1,r5
  31. xtrct r4,r0
  32. swap.w r0,r0
  33. sts macl,r2
  34. cmp/hs r2,r0
  35. sub r2,r0
  36. bt 0f
  37. addc r5,r0
  38. add #-1,r1
  39. bt 0f
  40. 1: add #-1,r1
  41. rts
  42. add r5,r0
  43. .balign 8
  44. .Lots:
  45. sub r5,r0
  46. swap.w r4,r1
  47. xtrct r0,r1
  48. clrt
  49. mov r1,r0
  50. addc r5,r0
  51. mov #-1,r1
  52. bf/s 1b
  53. shlr16 r1
  54. 0: rts
  55. nop