spl_board_init.c 3.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015-2016 Socionext Inc.
  4. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  5. */
  6. #include <debug_uart.h>
  7. #include <hang.h>
  8. #include <spl.h>
  9. #include "init.h"
  10. #include "micro-support-card.h"
  11. #include "soc-info.h"
  12. struct uniphier_spl_initdata {
  13. unsigned int soc_id;
  14. void (*bcu_init)(const struct uniphier_board_data *bd);
  15. void (*early_clk_init)(void);
  16. int (*dpll_init)(const struct uniphier_board_data *bd);
  17. int (*memconf_init)(const struct uniphier_board_data *bd);
  18. void (*dram_clk_init)(void);
  19. int (*umc_init)(const struct uniphier_board_data *bd);
  20. };
  21. static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
  22. #if defined(CONFIG_ARCH_UNIPHIER_LD4)
  23. {
  24. .soc_id = UNIPHIER_LD4_ID,
  25. .bcu_init = uniphier_ld4_bcu_init,
  26. .early_clk_init = uniphier_ld4_early_clk_init,
  27. .dpll_init = uniphier_ld4_dpll_init,
  28. .memconf_init = uniphier_memconf_2ch_init,
  29. .dram_clk_init = uniphier_ld4_dram_clk_init,
  30. .umc_init = uniphier_ld4_umc_init,
  31. },
  32. #endif
  33. #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
  34. {
  35. .soc_id = UNIPHIER_PRO4_ID,
  36. .early_clk_init = uniphier_ld4_early_clk_init,
  37. .dpll_init = uniphier_pro4_dpll_init,
  38. .memconf_init = uniphier_memconf_2ch_init,
  39. .dram_clk_init = uniphier_ld4_dram_clk_init,
  40. .umc_init = uniphier_pro4_umc_init,
  41. },
  42. #endif
  43. #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
  44. {
  45. .soc_id = UNIPHIER_SLD8_ID,
  46. .bcu_init = uniphier_ld4_bcu_init,
  47. .early_clk_init = uniphier_ld4_early_clk_init,
  48. .dpll_init = uniphier_sld8_dpll_init,
  49. .memconf_init = uniphier_memconf_2ch_init,
  50. .dram_clk_init = uniphier_ld4_dram_clk_init,
  51. .umc_init = uniphier_sld8_umc_init,
  52. },
  53. #endif
  54. #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
  55. {
  56. .soc_id = UNIPHIER_PRO5_ID,
  57. .early_clk_init = uniphier_ld4_early_clk_init,
  58. .dpll_init = uniphier_pro5_dpll_init,
  59. .memconf_init = uniphier_memconf_2ch_init,
  60. .dram_clk_init = uniphier_pro5_dram_clk_init,
  61. .umc_init = uniphier_pro5_umc_init,
  62. },
  63. #endif
  64. #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
  65. {
  66. .soc_id = UNIPHIER_PXS2_ID,
  67. .early_clk_init = uniphier_ld4_early_clk_init,
  68. .dpll_init = uniphier_pxs2_dpll_init,
  69. .memconf_init = uniphier_memconf_3ch_init,
  70. .dram_clk_init = uniphier_pxs2_dram_clk_init,
  71. .umc_init = uniphier_pxs2_umc_init,
  72. },
  73. #endif
  74. #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
  75. {
  76. .soc_id = UNIPHIER_LD6B_ID,
  77. .early_clk_init = uniphier_ld4_early_clk_init,
  78. .dpll_init = uniphier_pxs2_dpll_init,
  79. .memconf_init = uniphier_memconf_3ch_init,
  80. .dram_clk_init = uniphier_pxs2_dram_clk_init,
  81. .umc_init = uniphier_pxs2_umc_init,
  82. },
  83. #endif
  84. };
  85. UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_spl_initdata, uniphier_spl_initdata)
  86. void spl_board_init(void)
  87. {
  88. const struct uniphier_board_data *bd;
  89. const struct uniphier_spl_initdata *initdata;
  90. int ret;
  91. #ifdef CONFIG_DEBUG_UART
  92. debug_uart_init();
  93. #endif
  94. bd = uniphier_get_board_param();
  95. if (!bd)
  96. hang();
  97. initdata = uniphier_get_spl_initdata();
  98. if (!initdata)
  99. hang();
  100. if (initdata->bcu_init)
  101. initdata->bcu_init(bd);
  102. initdata->early_clk_init();
  103. preloader_console_init();
  104. ret = initdata->dpll_init(bd);
  105. if (ret) {
  106. pr_err("failed to init DPLL\n");
  107. hang();
  108. }
  109. ret = initdata->memconf_init(bd);
  110. if (ret) {
  111. pr_err("failed to init MEMCONF\n");
  112. hang();
  113. }
  114. initdata->dram_clk_init();
  115. ret = initdata->umc_init(bd);
  116. if (ret) {
  117. pr_err("failed to init DRAM\n");
  118. hang();
  119. }
  120. }