gpu.c 1.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
  4. */
  5. /* Tegra vpr routines */
  6. #include <common.h>
  7. #include <log.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/tegra.h>
  10. #include <asm/arch/mc.h>
  11. #include <asm/arch-tegra/ap.h>
  12. #include <fdt_support.h>
  13. static bool _configured;
  14. void tegra_gpu_config(void)
  15. {
  16. struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
  17. #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
  18. if (!tegra_cpu_is_non_secure())
  19. #endif
  20. {
  21. /* Turn VPR off */
  22. writel(0, &mc->mc_video_protect_size_mb);
  23. writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
  24. &mc->mc_video_protect_reg_ctrl);
  25. /* read back to ensure the write went through */
  26. readl(&mc->mc_video_protect_reg_ctrl);
  27. }
  28. debug("configured VPR\n");
  29. _configured = true;
  30. }
  31. #if defined(CONFIG_OF_LIBFDT)
  32. int tegra_gpu_enable_node(void *blob, const char *compat)
  33. {
  34. int offset;
  35. if (!_configured)
  36. return 0;
  37. offset = fdt_node_offset_by_compatible(blob, -1, compat);
  38. while (offset != -FDT_ERR_NOTFOUND) {
  39. fdt_status_okay(blob, offset);
  40. offset = fdt_node_offset_by_compatible(blob, offset, compat);
  41. }
  42. return 0;
  43. }
  44. #endif