vc.c 4.1 KB

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  1. /*
  2. * Voltage Controller implementation for OMAP
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. * Nishanth Menon
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  12. * kind, whether express or implied; without even the implied warranty
  13. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <common.h>
  17. #include <asm/omap_common.h>
  18. #include <asm/arch/sys_proto.h>
  19. #include <asm/arch/clock.h>
  20. /* Register defines and masks for VC IP Block */
  21. /* PRM_VC_CFG_I2C_MODE */
  22. #define PRM_VC_CFG_I2C_MODE_DFILTEREN_BIT (0x1 << 6)
  23. #define PRM_VC_CFG_I2C_MODE_SRMODEEN_BIT (0x1 << 4)
  24. #define PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT (0x1 << 3)
  25. #define PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT 0x0
  26. #define PRM_VC_CFG_I2C_MODE_HSMCODE_MASK 0x3
  27. /* PRM_VC_CFG_I2C_CLK */
  28. #define PRM_VC_CFG_I2C_CLK_HSCLL_SHIFT 24
  29. #define PRM_VC_CFG_I2C_CLK_HSCLL_MASK 0xFF
  30. #define PRM_VC_CFG_I2C_CLK_HSCLH_SHIFT 16
  31. #define PRM_VC_CFG_I2C_CLK_HSCLH_MASK 0xFF
  32. #define PRM_VC_CFG_I2C_CLK_SCLH_SHIFT 0
  33. #define PRM_VC_CFG_I2C_CLK_SCLH_MASK 0xFF
  34. #define PRM_VC_CFG_I2C_CLK_SCLL_SHIFT 8
  35. #define PRM_VC_CFG_I2C_CLK_SCLL_MASK (0xFF << 8)
  36. /* PRM_VC_VAL_BYPASS */
  37. #define PRM_VC_VAL_BYPASS_VALID_BIT (0x1 << 24)
  38. #define PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT 0
  39. #define PRM_VC_VAL_BYPASS_SLAVEADDR_MASK 0x7F
  40. #define PRM_VC_VAL_BYPASS_REGADDR_SHIFT 8
  41. #define PRM_VC_VAL_BYPASS_REGADDR_MASK 0xFF
  42. #define PRM_VC_VAL_BYPASS_DATA_SHIFT 16
  43. #define PRM_VC_VAL_BYPASS_DATA_MASK 0xFF
  44. /**
  45. * omap_vc_init() - Initialization for Voltage controller
  46. * @speed_khz: I2C buspeed in KHz
  47. */
  48. static void omap_vc_init(u16 speed_khz)
  49. {
  50. u32 val;
  51. u32 sys_clk_khz, cycles_hi, cycles_low;
  52. sys_clk_khz = get_sys_clk_freq() / 1000;
  53. if (speed_khz > 400) {
  54. puts("higher speed requested - throttle to 400Khz\n");
  55. speed_khz = 400;
  56. }
  57. /*
  58. * Setup the dedicated I2C controller for Voltage Control
  59. * I2C clk - high period 40% low period 60%
  60. */
  61. speed_khz /= 10;
  62. cycles_hi = sys_clk_khz * 4 / speed_khz;
  63. cycles_low = sys_clk_khz * 6 / speed_khz;
  64. /* values to be set in register - less by 5 & 7 respectively */
  65. cycles_hi -= 5;
  66. cycles_low -= 7;
  67. val = (cycles_hi << PRM_VC_CFG_I2C_CLK_SCLH_SHIFT) |
  68. (cycles_low << PRM_VC_CFG_I2C_CLK_SCLL_SHIFT);
  69. writel(val, (*prcm)->prm_vc_cfg_i2c_clk);
  70. /*
  71. * Master code if there are multiple masters on the I2C_SR bus.
  72. */
  73. val = 0x0 << PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT;
  74. /* No HS mode for now */
  75. val &= ~PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT;
  76. writel(val, (*prcm)->prm_vc_cfg_i2c_mode);
  77. }
  78. /**
  79. * omap_vc_bypass_send_value() - Send a data using VC Bypass command
  80. * @sa: 7 bit I2C slave address of the PMIC
  81. * @reg_addr: I2C register address(8 bit) address in PMIC
  82. * @reg_data: what 8 bit data to write
  83. */
  84. int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data)
  85. {
  86. /*
  87. * Unfortunately we need to loop here instead of a defined time
  88. * use arbitary large value
  89. */
  90. u32 timeout = 0xFFFF;
  91. u32 reg_val;
  92. sa &= PRM_VC_VAL_BYPASS_SLAVEADDR_MASK;
  93. reg_addr &= PRM_VC_VAL_BYPASS_REGADDR_MASK;
  94. reg_data &= PRM_VC_VAL_BYPASS_DATA_MASK;
  95. /* program VC to send data */
  96. reg_val = sa << PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT |
  97. reg_addr << PRM_VC_VAL_BYPASS_REGADDR_SHIFT |
  98. reg_data << PRM_VC_VAL_BYPASS_DATA_SHIFT;
  99. writel(reg_val, (*prcm)->prm_vc_val_bypass);
  100. /* Signal VC to send data */
  101. writel(reg_val | PRM_VC_VAL_BYPASS_VALID_BIT,
  102. (*prcm)->prm_vc_val_bypass);
  103. /* Wait on VC to complete transmission */
  104. do {
  105. reg_val = readl((*prcm)->prm_vc_val_bypass) &
  106. PRM_VC_VAL_BYPASS_VALID_BIT;
  107. if (!reg_val)
  108. break;
  109. sdelay(100);
  110. } while (--timeout);
  111. /* Optional: cleanup PRM_IRQSTATUS_Ax */
  112. /* In case we can do something about it in future.. */
  113. if (!timeout)
  114. return -1;
  115. /* All good.. */
  116. return 0;
  117. }
  118. void sri2c_init(void)
  119. {
  120. static int sri2c = 1;
  121. if (sri2c) {
  122. omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ);
  123. sri2c = 0;
  124. }
  125. return;
  126. }