hwinit-common.c 7.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. *
  4. * Common functions for OMAP4/5 based boards
  5. *
  6. * (C) Copyright 2010
  7. * Texas Instruments, <www.ti.com>
  8. *
  9. * Author :
  10. * Aneesh V <aneesh@ti.com>
  11. * Steve Sakoman <steve@sakoman.com>
  12. */
  13. #include <common.h>
  14. #include <debug_uart.h>
  15. #include <fdtdec.h>
  16. #include <init.h>
  17. #include <spl.h>
  18. #include <asm/arch/sys_proto.h>
  19. #include <asm/global_data.h>
  20. #include <linux/sizes.h>
  21. #include <asm/emif.h>
  22. #include <asm/omap_common.h>
  23. #include <linux/compiler.h>
  24. #include <asm/system.h>
  25. #include <dm/root.h>
  26. DECLARE_GLOBAL_DATA_PTR;
  27. void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
  28. {
  29. int i;
  30. struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
  31. for (i = 0; i < size; i++, pad++)
  32. writew(pad->val, base + pad->offset);
  33. }
  34. static void set_mux_conf_regs(void)
  35. {
  36. switch (omap_hw_init_context()) {
  37. case OMAP_INIT_CONTEXT_SPL:
  38. set_muxconf_regs();
  39. break;
  40. case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
  41. break;
  42. case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
  43. case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
  44. set_muxconf_regs();
  45. break;
  46. }
  47. }
  48. u32 cortex_rev(void)
  49. {
  50. unsigned int rev;
  51. /* Read Main ID Register (MIDR) */
  52. asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
  53. return rev;
  54. }
  55. static void omap_rev_string(void)
  56. {
  57. u32 omap_rev = omap_revision();
  58. u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
  59. u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
  60. u32 major_rev = (omap_rev & 0x00000F00) >> 8;
  61. u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
  62. const char *sec_s, *package = NULL;
  63. switch (get_device_type()) {
  64. case TST_DEVICE:
  65. sec_s = "TST";
  66. break;
  67. case EMU_DEVICE:
  68. sec_s = "EMU";
  69. break;
  70. case HS_DEVICE:
  71. sec_s = "HS";
  72. break;
  73. case GP_DEVICE:
  74. sec_s = "GP";
  75. break;
  76. default:
  77. sec_s = "?";
  78. }
  79. #if defined(CONFIG_DRA7XX)
  80. if (is_dra76x()) {
  81. switch (omap_rev & 0xF) {
  82. case DRA762_ABZ_PACKAGE:
  83. package = "ABZ";
  84. break;
  85. case DRA762_ACD_PACKAGE:
  86. default:
  87. package = "ACD";
  88. break;
  89. }
  90. }
  91. #endif
  92. if (soc_variant)
  93. printf("OMAP");
  94. else
  95. printf("DRA");
  96. printf("%x-%s ES%x.%x", omap_variant, sec_s, major_rev, minor_rev);
  97. if (package)
  98. printf(" %s package\n", package);
  99. else
  100. puts("\n");
  101. }
  102. #ifdef CONFIG_SPL_BUILD
  103. void spl_display_print(void)
  104. {
  105. omap_rev_string();
  106. }
  107. #endif
  108. void __weak srcomp_enable(void)
  109. {
  110. }
  111. /**
  112. * do_board_detect() - Detect board description
  113. *
  114. * Function to detect board description. This is expected to be
  115. * overridden in the SoC family board file where desired.
  116. */
  117. void __weak do_board_detect(void)
  118. {
  119. }
  120. /**
  121. * vcores_init() - Assign omap_vcores based on board
  122. *
  123. * Function to pick the vcores based on board. This is expected to be
  124. * overridden in the SoC family board file where desired.
  125. */
  126. void __weak vcores_init(void)
  127. {
  128. }
  129. void s_init(void)
  130. {
  131. }
  132. /**
  133. * init_package_revision() - Initialize package revision
  134. *
  135. * Function to get the pacakage information. This is expected to be
  136. * overridden in the SoC family file where desired.
  137. */
  138. void __weak init_package_revision(void)
  139. {
  140. }
  141. /**
  142. * early_system_init - Does Early system initialization.
  143. *
  144. * Does early system init of watchdog, muxing, andclocks
  145. * Watchdog disable is done always. For the rest what gets done
  146. * depends on the boot mode in which this function is executed when
  147. * 1. SPL running from SRAM
  148. * 2. U-Boot running from FLASH
  149. * 3. U-Boot loaded to SDRAM by SPL
  150. * 4. U-Boot loaded to SDRAM by ROM code using the
  151. * Configuration Header feature
  152. * Please have a look at the respective functions to see what gets
  153. * done in each of these cases
  154. * This function is called with SRAM stack.
  155. */
  156. void early_system_init(void)
  157. {
  158. #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
  159. int ret;
  160. int rescan;
  161. #endif
  162. init_omap_revision();
  163. hw_data_init();
  164. init_package_revision();
  165. #ifdef CONFIG_SPL_BUILD
  166. if (warm_reset())
  167. force_emif_self_refresh();
  168. #endif
  169. watchdog_init();
  170. set_mux_conf_regs();
  171. #ifdef CONFIG_SPL_BUILD
  172. srcomp_enable();
  173. do_io_settings();
  174. #endif
  175. setup_early_clocks();
  176. #ifdef CONFIG_SPL_BUILD
  177. /*
  178. * Save the boot parameters passed from romcode.
  179. * We cannot delay the saving further than this,
  180. * to prevent overwrites.
  181. */
  182. save_omap_boot_params();
  183. spl_early_init();
  184. #endif
  185. do_board_detect();
  186. #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
  187. /*
  188. * Board detection has been done.
  189. * Let us see if another dtb wouldn't be a better match
  190. * for our board
  191. */
  192. ret = fdtdec_resetup(&rescan);
  193. if (!ret && rescan) {
  194. dm_uninit();
  195. dm_init_and_scan(true);
  196. }
  197. #endif
  198. vcores_init();
  199. #ifdef CONFIG_DEBUG_UART_OMAP
  200. debug_uart_init();
  201. #endif
  202. prcm_init();
  203. }
  204. #ifdef CONFIG_SPL_BUILD
  205. void board_init_f(ulong dummy)
  206. {
  207. early_system_init();
  208. #ifdef CONFIG_BOARD_EARLY_INIT_F
  209. board_early_init_f();
  210. #endif
  211. /* For regular u-boot sdram_init() is called from dram_init() */
  212. sdram_init();
  213. gd->ram_size = omap_sdram_size();
  214. }
  215. #endif
  216. int arch_cpu_init_dm(void)
  217. {
  218. early_system_init();
  219. return 0;
  220. }
  221. /*
  222. * Routine: wait_for_command_complete
  223. * Description: Wait for posting to finish on watchdog
  224. */
  225. void wait_for_command_complete(struct watchdog *wd_base)
  226. {
  227. int pending = 1;
  228. do {
  229. pending = readl(&wd_base->wwps);
  230. } while (pending);
  231. }
  232. /*
  233. * Routine: watchdog_init
  234. * Description: Shut down watch dogs
  235. */
  236. void watchdog_init(void)
  237. {
  238. struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
  239. writel(WD_UNLOCK1, &wd2_base->wspr);
  240. wait_for_command_complete(wd2_base);
  241. writel(WD_UNLOCK2, &wd2_base->wspr);
  242. }
  243. /*
  244. * This function finds the SDRAM size available in the system
  245. * based on DMM section configurations
  246. * This is needed because the size of memory installed may be
  247. * different on different versions of the board
  248. */
  249. u32 omap_sdram_size(void)
  250. {
  251. u32 section, i, valid;
  252. u64 sdram_start = 0, sdram_end = 0, addr,
  253. size, total_size = 0, trap_size = 0, trap_start = 0;
  254. for (i = 0; i < 4; i++) {
  255. section = __raw_readl(DMM_BASE + i*4);
  256. valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
  257. (EMIF_SDRC_ADDRSPC_SHIFT);
  258. addr = section & EMIF_SYS_ADDR_MASK;
  259. /* See if the address is valid */
  260. if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
  261. (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
  262. size = ((section & EMIF_SYS_SIZE_MASK) >>
  263. EMIF_SYS_SIZE_SHIFT);
  264. size = 1 << size;
  265. size *= SZ_16M;
  266. if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
  267. if (!sdram_start || (addr < sdram_start))
  268. sdram_start = addr;
  269. if (!sdram_end || ((addr + size) > sdram_end))
  270. sdram_end = addr + size;
  271. } else {
  272. trap_size = size;
  273. trap_start = addr;
  274. }
  275. }
  276. }
  277. if ((trap_start >= sdram_start) && (trap_start < sdram_end))
  278. total_size = (sdram_end - sdram_start) - (trap_size);
  279. else
  280. total_size = sdram_end - sdram_start;
  281. return total_size;
  282. }
  283. /*
  284. * Routine: dram_init
  285. * Description: sets uboots idea of sdram size
  286. */
  287. int dram_init(void)
  288. {
  289. sdram_init();
  290. gd->ram_size = omap_sdram_size();
  291. return 0;
  292. }
  293. /*
  294. * Print board information
  295. */
  296. int checkboard(void)
  297. {
  298. puts(sysinfo.board_string);
  299. return 0;
  300. }
  301. #if defined(CONFIG_DISPLAY_CPUINFO)
  302. /*
  303. * Print CPU information
  304. */
  305. int print_cpuinfo(void)
  306. {
  307. puts("CPU : ");
  308. omap_rev_string();
  309. return 0;
  310. }
  311. #endif