boot-common.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * boot-common.c
  4. *
  5. * Common bootmode functions for omap based boards
  6. *
  7. * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  8. */
  9. #include <common.h>
  10. #include <ahci.h>
  11. #include <log.h>
  12. #include <spl.h>
  13. #include <asm/global_data.h>
  14. #include <asm/omap_common.h>
  15. #include <asm/arch/omap.h>
  16. #include <asm/arch/mmc_host_def.h>
  17. #include <asm/arch/sys_proto.h>
  18. #include <watchdog.h>
  19. #include <scsi.h>
  20. #include <i2c.h>
  21. DECLARE_GLOBAL_DATA_PTR;
  22. __weak u32 omap_sys_boot_device(void)
  23. {
  24. return BOOT_DEVICE_NONE;
  25. }
  26. void save_omap_boot_params(void)
  27. {
  28. u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
  29. struct omap_boot_parameters *omap_boot_params;
  30. int sys_boot_device = 0;
  31. u32 boot_device;
  32. u32 boot_mode;
  33. if ((boot_params < NON_SECURE_SRAM_START) ||
  34. (boot_params > NON_SECURE_SRAM_END))
  35. return;
  36. omap_boot_params = (struct omap_boot_parameters *)boot_params;
  37. boot_device = omap_boot_params->boot_device;
  38. boot_mode = MMCSD_MODE_UNDEFINED;
  39. /* Boot device */
  40. #ifdef BOOT_DEVICE_NAND_I2C
  41. /*
  42. * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
  43. * Otherwise the SPL boot IF can't handle this device correctly.
  44. * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
  45. * Draco leads to this boot-device passed to SPL from the BootROM.
  46. */
  47. if (boot_device == BOOT_DEVICE_NAND_I2C)
  48. boot_device = BOOT_DEVICE_NAND;
  49. #endif
  50. #ifdef BOOT_DEVICE_QSPI_4
  51. /*
  52. * We get different values for QSPI_1 and QSPI_4 being used, but
  53. * don't actually care about this difference. Rather than
  54. * mangle the later code, if we're coming in as QSPI_4 just
  55. * change to the QSPI_1 value.
  56. */
  57. if (boot_device == BOOT_DEVICE_QSPI_4)
  58. boot_device = BOOT_DEVICE_SPI;
  59. #endif
  60. #ifdef CONFIG_TI816X
  61. /*
  62. * On PG2.0 and later TI816x the values we get when booting are not the
  63. * same as on PG1.0, which is what the defines are based on. Update
  64. * them as needed.
  65. */
  66. if (get_cpu_rev() != 1) {
  67. if (boot_device == 0x05) {
  68. omap_boot_params->boot_device = BOOT_DEVICE_NAND;
  69. boot_device = BOOT_DEVICE_NAND;
  70. }
  71. if (boot_device == 0x08) {
  72. omap_boot_params->boot_device = BOOT_DEVICE_MMC1;
  73. boot_device = BOOT_DEVICE_MMC1;
  74. }
  75. }
  76. #endif
  77. /*
  78. * When booting from peripheral booting, the boot device is not usable
  79. * as-is (unless there is support for it), so the boot device is instead
  80. * figured out using the SYS_BOOT pins.
  81. */
  82. switch (boot_device) {
  83. #if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
  84. case BOOT_DEVICE_UART:
  85. sys_boot_device = 1;
  86. break;
  87. #endif
  88. #if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_STORAGE)
  89. case BOOT_DEVICE_USB:
  90. sys_boot_device = 1;
  91. break;
  92. #endif
  93. #if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USB_ETHER)
  94. case BOOT_DEVICE_USBETH:
  95. sys_boot_device = 1;
  96. break;
  97. #endif
  98. #if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH)
  99. case BOOT_DEVICE_CPGMAC:
  100. sys_boot_device = 1;
  101. break;
  102. #endif
  103. #if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU)
  104. case BOOT_DEVICE_DFU:
  105. sys_boot_device = 1;
  106. break;
  107. #endif
  108. }
  109. if (sys_boot_device) {
  110. boot_device = omap_sys_boot_device();
  111. /* MMC raw mode will fallback to FS mode. */
  112. if ((boot_device >= MMC_BOOT_DEVICES_START) &&
  113. (boot_device <= MMC_BOOT_DEVICES_END))
  114. boot_mode = MMCSD_MODE_RAW;
  115. }
  116. gd->arch.omap_boot_device = boot_device;
  117. /* Boot mode */
  118. #ifdef CONFIG_OMAP34XX
  119. if ((boot_device >= MMC_BOOT_DEVICES_START) &&
  120. (boot_device <= MMC_BOOT_DEVICES_END)) {
  121. switch (boot_device) {
  122. case BOOT_DEVICE_MMC1:
  123. boot_mode = MMCSD_MODE_FS;
  124. break;
  125. case BOOT_DEVICE_MMC2:
  126. boot_mode = MMCSD_MODE_RAW;
  127. break;
  128. }
  129. }
  130. #else
  131. /*
  132. * If the boot device was dynamically changed and doesn't match what
  133. * the bootrom initially booted, we cannot use the boot device
  134. * descriptor to figure out the boot mode.
  135. */
  136. if ((boot_device == omap_boot_params->boot_device) &&
  137. (boot_device >= MMC_BOOT_DEVICES_START) &&
  138. (boot_device <= MMC_BOOT_DEVICES_END)) {
  139. boot_params = omap_boot_params->boot_device_descriptor;
  140. if ((boot_params < NON_SECURE_SRAM_START) ||
  141. (boot_params > NON_SECURE_SRAM_END))
  142. return;
  143. boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
  144. if ((boot_params < NON_SECURE_SRAM_START) ||
  145. (boot_params > NON_SECURE_SRAM_END))
  146. return;
  147. boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
  148. if (boot_mode != MMCSD_MODE_FS &&
  149. boot_mode != MMCSD_MODE_RAW)
  150. #ifdef CONFIG_SUPPORT_EMMC_BOOT
  151. boot_mode = MMCSD_MODE_EMMCBOOT;
  152. #else
  153. boot_mode = MMCSD_MODE_UNDEFINED;
  154. #endif
  155. }
  156. #endif
  157. gd->arch.omap_boot_mode = boot_mode;
  158. #if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
  159. !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
  160. /* CH flags */
  161. gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
  162. #endif
  163. }
  164. #ifdef CONFIG_SPL_BUILD
  165. u32 spl_boot_device(void)
  166. {
  167. return gd->arch.omap_boot_device;
  168. }
  169. u32 spl_mmc_boot_mode(const u32 boot_device)
  170. {
  171. return gd->arch.omap_boot_mode;
  172. }
  173. void spl_board_init(void)
  174. {
  175. /* Prepare console output */
  176. preloader_console_init();
  177. #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
  178. gpmc_init();
  179. #endif
  180. #if defined(CONFIG_SPL_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
  181. i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
  182. #endif
  183. #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW)
  184. arch_misc_init();
  185. #endif
  186. #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
  187. hw_watchdog_init();
  188. #endif
  189. #ifdef CONFIG_AM33XX
  190. am33xx_spl_board_init();
  191. #endif
  192. }
  193. void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
  194. {
  195. typedef void __noreturn (*image_entry_noargs_t)(u32 *);
  196. image_entry_noargs_t image_entry =
  197. (image_entry_noargs_t) spl_image->entry_point;
  198. u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
  199. debug("image entry point: 0x%lX\n", spl_image->entry_point);
  200. /* Pass the saved boot_params from rom code */
  201. image_entry((u32 *)boot_params);
  202. }
  203. #endif
  204. #ifdef CONFIG_SCSI_AHCI_PLAT
  205. void arch_preboot_os(void)
  206. {
  207. ahci_reset((void __iomem *)DWC_AHSATA_BASE);
  208. }
  209. #endif