psc.c 2.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Power and Sleep Controller (PSC) functions.
  4. *
  5. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  6. * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
  7. * Copyright (C) 2004 Texas Instruments.
  8. */
  9. #include <common.h>
  10. #include <asm/arch/hardware.h>
  11. #include <asm/io.h>
  12. /*
  13. * The PSC manages three inputs to a "module" which may be a peripheral or
  14. * CPU. Those inputs are the module's: clock; reset signal; and sometimes
  15. * its power domain. For our purposes, we only care whether clock and power
  16. * are active, and the module is out of reset.
  17. *
  18. * DaVinci chips may include two separate power domains: "Always On" and "DSP".
  19. * Chips without a DSP generally have only one domain.
  20. *
  21. * The "Always On" power domain is always on when the chip is on, and is
  22. * powered by the VDD pins (on DM644X). The majority of DaVinci modules
  23. * lie within the "Always On" power domain.
  24. *
  25. * A separate domain called the "DSP" domain houses the C64x+ and other video
  26. * hardware such as VICP. In some chips, the "DSP" domain is not always on.
  27. * The "DSP" power domain is powered by the CVDDDSP pins (on DM644X).
  28. */
  29. /* Works on Always On power domain only (no PD argument) */
  30. static void lpsc_transition(unsigned int id, unsigned int state)
  31. {
  32. dv_reg_p mdstat, mdctl, ptstat, ptcmd;
  33. struct davinci_psc_regs *psc_regs;
  34. if (id < DAVINCI_LPSC_PSC1_BASE) {
  35. if (id >= PSC_PSC0_MODULE_ID_CNT)
  36. return;
  37. psc_regs = davinci_psc0_regs;
  38. mdstat = &psc_regs->psc0.mdstat[id];
  39. mdctl = &psc_regs->psc0.mdctl[id];
  40. } else {
  41. id -= DAVINCI_LPSC_PSC1_BASE;
  42. if (id >= PSC_PSC1_MODULE_ID_CNT)
  43. return;
  44. psc_regs = davinci_psc1_regs;
  45. mdstat = &psc_regs->psc1.mdstat[id];
  46. mdctl = &psc_regs->psc1.mdctl[id];
  47. }
  48. ptstat = &psc_regs->ptstat;
  49. ptcmd = &psc_regs->ptcmd;
  50. while (readl(ptstat) & 0x01)
  51. continue;
  52. if ((readl(mdstat) & PSC_MDSTAT_STATE) == state)
  53. return; /* Already in that state */
  54. writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl);
  55. writel(0x01, ptcmd);
  56. while (readl(ptstat) & 0x01)
  57. continue;
  58. while ((readl(mdstat) & PSC_MDSTAT_STATE) != state)
  59. continue;
  60. }
  61. void lpsc_on(unsigned int id)
  62. {
  63. lpsc_transition(id, 0x03);
  64. }
  65. void lpsc_syncreset(unsigned int id)
  66. {
  67. lpsc_transition(id, 0x01);
  68. }
  69. void lpsc_disable(unsigned int id)
  70. {
  71. lpsc_transition(id, 0x0);
  72. }