Kconfig 10 KB

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  1. config ARCH_MAP_SYSMEM
  2. depends on SANDBOX || NDS32
  3. def_bool y
  4. config CREATE_ARCH_SYMLINK
  5. bool
  6. config HAVE_ARCH_IOREMAP
  7. bool
  8. config NEEDS_MANUAL_RELOC
  9. bool
  10. config SYS_CACHE_SHIFT_4
  11. bool
  12. config SYS_CACHE_SHIFT_5
  13. bool
  14. config SYS_CACHE_SHIFT_6
  15. bool
  16. config SYS_CACHE_SHIFT_7
  17. bool
  18. config SYS_CACHELINE_SIZE
  19. int
  20. default 128 if SYS_CACHE_SHIFT_7
  21. default 64 if SYS_CACHE_SHIFT_6
  22. default 32 if SYS_CACHE_SHIFT_5
  23. default 16 if SYS_CACHE_SHIFT_4
  24. # Fall-back for MIPS
  25. default 32 if MIPS
  26. config LINKER_LIST_ALIGN
  27. int
  28. default 32 if SANDBOX
  29. default 8 if ARM64 || X86
  30. default 4
  31. help
  32. Force the each linker list to be aligned to this boundary. This
  33. is required if ll_entry_get() is used, since otherwise the linker
  34. may add padding into the table, thus breaking it.
  35. See linker_lists.rst for full details.
  36. choice
  37. prompt "Architecture select"
  38. default SANDBOX
  39. config ARC
  40. bool "ARC architecture"
  41. select ARC_TIMER
  42. select CLK
  43. select DM
  44. select HAVE_PRIVATE_LIBGCC
  45. select SUPPORT_OF_CONTROL
  46. select SYS_CACHE_SHIFT_7
  47. select TIMER
  48. config ARM
  49. bool "ARM architecture"
  50. select ARCH_SUPPORTS_LTO
  51. select CREATE_ARCH_SYMLINK
  52. select HAVE_PRIVATE_LIBGCC if !ARM64
  53. select SUPPORT_ACPI
  54. select SUPPORT_OF_CONTROL
  55. config M68K
  56. bool "M68000 architecture"
  57. select HAVE_PRIVATE_LIBGCC
  58. select NEEDS_MANUAL_RELOC
  59. select SYS_BOOT_GET_CMDLINE
  60. select SYS_BOOT_GET_KBD
  61. select SYS_CACHE_SHIFT_4
  62. select SUPPORT_OF_CONTROL
  63. config MICROBLAZE
  64. bool "MicroBlaze architecture"
  65. select NEEDS_MANUAL_RELOC
  66. select SUPPORT_OF_CONTROL
  67. imply CMD_IRQ
  68. config MIPS
  69. bool "MIPS architecture"
  70. select HAVE_ARCH_IOREMAP
  71. select HAVE_PRIVATE_LIBGCC
  72. select SUPPORT_OF_CONTROL
  73. config NDS32
  74. bool "NDS32 architecture"
  75. select SUPPORT_OF_CONTROL
  76. config NIOS2
  77. bool "Nios II architecture"
  78. select CPU
  79. select DM
  80. select OF_CONTROL
  81. select SUPPORT_OF_CONTROL
  82. imply CMD_DM
  83. config PPC
  84. bool "PowerPC architecture"
  85. select HAVE_PRIVATE_LIBGCC
  86. select SUPPORT_OF_CONTROL
  87. select SYS_BOOT_GET_CMDLINE
  88. select SYS_BOOT_GET_KBD
  89. config RISCV
  90. bool "RISC-V architecture"
  91. select CREATE_ARCH_SYMLINK
  92. select SUPPORT_OF_CONTROL
  93. select OF_CONTROL
  94. select DM
  95. imply DM_SERIAL
  96. imply DM_ETH
  97. imply DM_MMC
  98. imply DM_SPI
  99. imply DM_SPI_FLASH
  100. imply BLK
  101. imply CLK
  102. imply MTD
  103. imply TIMER
  104. imply CMD_DM
  105. imply SPL_DM
  106. imply SPL_OF_CONTROL
  107. imply SPL_LIBCOMMON_SUPPORT
  108. imply SPL_LIBGENERIC_SUPPORT
  109. imply SPL_SERIAL
  110. imply SPL_TIMER
  111. config SANDBOX
  112. bool "Sandbox"
  113. select ARCH_SUPPORTS_LTO
  114. select BOARD_LATE_INIT
  115. select BZIP2
  116. select CMD_POWEROFF
  117. select DM
  118. select DM_GPIO
  119. select DM_I2C
  120. select DM_KEYBOARD
  121. select DM_MMC
  122. select DM_SERIAL
  123. select DM_SPI
  124. select DM_SPI_FLASH
  125. select GZIP_COMPRESSED
  126. select HAVE_BLOCK_DEVICE
  127. select LZO
  128. select OF_BOARD_SETUP
  129. select PCI_ENDPOINT
  130. select SPI
  131. select SUPPORT_OF_CONTROL
  132. select SYSRESET_CMD_POWEROFF
  133. select SYS_CACHE_SHIFT_4
  134. select IRQ
  135. select SUPPORT_EXTENSION_SCAN
  136. select SUPPORT_ACPI
  137. imply BITREVERSE
  138. select BLOBLIST
  139. imply LTO
  140. imply CMD_DM
  141. imply CMD_EXCEPTION
  142. imply CMD_GETTIME
  143. imply CMD_HASH
  144. imply CMD_IO
  145. imply CMD_IOTRACE
  146. imply CMD_LZMADEC
  147. imply CMD_SATA
  148. imply CMD_SF
  149. imply CMD_SF_TEST
  150. imply CRC32_VERIFY
  151. imply FAT_WRITE
  152. imply FIRMWARE
  153. imply HASH_VERIFY
  154. imply LZMA
  155. imply TEE
  156. imply AVB_VERIFY
  157. imply LIBAVB
  158. imply CMD_AVB
  159. imply PARTITION_TYPE_GUID
  160. imply SCP03
  161. imply CMD_SCP03
  162. imply UDP_FUNCTION_FASTBOOT
  163. imply VIRTIO_MMIO
  164. imply VIRTIO_PCI
  165. imply VIRTIO_SANDBOX
  166. imply VIRTIO_BLK
  167. imply VIRTIO_NET
  168. imply DM_SOUND
  169. imply PCI_SANDBOX_EP
  170. imply PCH
  171. imply PHYLIB
  172. imply DM_MDIO
  173. imply DM_MDIO_MUX
  174. imply ACPI_PMC
  175. imply ACPI_PMC_SANDBOX
  176. imply CMD_PMC
  177. imply CMD_CLONE
  178. imply SILENT_CONSOLE
  179. imply BOOTARGS_SUBST
  180. imply PHY_FIXED
  181. imply DM_DSA
  182. imply CMD_EXTENSION
  183. imply KEYBOARD
  184. imply PHYSMEM
  185. imply GENERATE_ACPI_TABLE
  186. config SH
  187. bool "SuperH architecture"
  188. select HAVE_PRIVATE_LIBGCC
  189. select SUPPORT_OF_CONTROL
  190. config X86
  191. bool "x86 architecture"
  192. select SUPPORT_SPL
  193. select SUPPORT_TPL
  194. select CREATE_ARCH_SYMLINK
  195. select DM
  196. select HAVE_ARCH_IOMAP
  197. select HAVE_PRIVATE_LIBGCC
  198. select OF_CONTROL
  199. select PCI
  200. select SUPPORT_ACPI
  201. select SUPPORT_OF_CONTROL
  202. select SYS_CACHE_SHIFT_6
  203. select TIMER
  204. select USE_PRIVATE_LIBGCC
  205. select X86_TSC_TIMER
  206. select IRQ
  207. imply HAS_ROM if X86_RESET_VECTOR
  208. imply BLK
  209. imply CMD_DM
  210. imply CMD_FPGA_LOADMK
  211. imply CMD_GETTIME
  212. imply CMD_IO
  213. imply CMD_IRQ
  214. imply CMD_PCI
  215. imply CMD_SF
  216. imply CMD_SF_TEST
  217. imply CMD_ZBOOT
  218. imply DM_ETH
  219. imply DM_GPIO
  220. imply DM_KEYBOARD
  221. imply DM_MMC
  222. imply DM_RTC
  223. imply DM_SCSI
  224. imply DM_SERIAL
  225. imply DM_SPI
  226. imply DM_SPI_FLASH
  227. imply DM_USB
  228. imply DM_VIDEO
  229. imply SYSRESET
  230. imply SPL_SYSRESET
  231. imply SYSRESET_X86
  232. imply USB_ETHER_ASIX
  233. imply USB_ETHER_SMSC95XX
  234. imply USB_HOST_ETHER
  235. imply PCH
  236. imply PHYSMEM
  237. imply RTC_MC146818
  238. imply ACPIGEN if !QEMU && !EFI_APP
  239. imply SYSINFO if GENERATE_SMBIOS_TABLE
  240. imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
  241. imply TIMESTAMP
  242. # Thing to enable for when SPL/TPL are enabled: SPL
  243. imply SPL_DM
  244. imply SPL_OF_LIBFDT
  245. imply SPL_DRIVERS_MISC
  246. imply SPL_GPIO
  247. imply SPL_PINCTRL
  248. imply SPL_LIBCOMMON_SUPPORT
  249. imply SPL_LIBGENERIC_SUPPORT
  250. imply SPL_SERIAL
  251. imply SPL_SPI_FLASH_SUPPORT
  252. imply SPL_SPI
  253. imply SPL_OF_CONTROL
  254. imply SPL_TIMER
  255. imply SPL_REGMAP
  256. imply SPL_SYSCON
  257. # TPL
  258. imply TPL_DM
  259. imply TPL_DRIVERS_MISC
  260. imply TPL_GPIO
  261. imply TPL_PINCTRL
  262. imply TPL_LIBCOMMON_SUPPORT
  263. imply TPL_LIBGENERIC_SUPPORT
  264. imply TPL_SERIAL
  265. imply TPL_OF_CONTROL
  266. imply TPL_TIMER
  267. imply TPL_REGMAP
  268. imply TPL_SYSCON
  269. config XTENSA
  270. bool "Xtensa architecture"
  271. select CREATE_ARCH_SYMLINK
  272. select SUPPORT_OF_CONTROL
  273. endchoice
  274. config SYS_ARCH
  275. string
  276. help
  277. This option should contain the architecture name to build the
  278. appropriate arch/<CONFIG_SYS_ARCH> directory.
  279. All the architectures should specify this option correctly.
  280. config SYS_CPU
  281. string
  282. help
  283. This option should contain the CPU name to build the correct
  284. arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
  285. This is optional. For those targets without the CPU directory,
  286. leave this option empty.
  287. config SYS_SOC
  288. string
  289. help
  290. This option should contain the SoC name to build the directory
  291. arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
  292. This is optional. For those targets without the SoC directory,
  293. leave this option empty.
  294. config SYS_VENDOR
  295. string
  296. help
  297. This option should contain the vendor name of the target board.
  298. If it is set and
  299. board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
  300. directory is compiled.
  301. If CONFIG_SYS_BOARD is also set, the sources under
  302. board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
  303. This is optional. For those targets without the vendor directory,
  304. leave this option empty.
  305. config SYS_BOARD
  306. string
  307. help
  308. This option should contain the name of the target board.
  309. If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
  310. or board/<CONFIG_SYS_BOARD> directory is compiled depending on
  311. whether CONFIG_SYS_VENDOR is set or not.
  312. This is optional. For those targets without the board directory,
  313. leave this option empty.
  314. config SYS_CONFIG_NAME
  315. string
  316. help
  317. This option should contain the base name of board header file.
  318. The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
  319. should be included from include/config.h.
  320. config SYS_DISABLE_DCACHE_OPS
  321. bool
  322. help
  323. This option disables dcache flush and dcache invalidation
  324. operations. For example, on coherent systems where cache
  325. operatios are not required, enable this option to avoid them.
  326. Note that, its up to the individual architectures to implement
  327. this functionality.
  328. config SYS_IMMR
  329. hex
  330. depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
  331. default 0xFF000000 if MPC8xx
  332. default 0xF0000000 if ARCH_MPC8313
  333. default 0xE0000000 if MPC83xx && !ARCH_MPC8313
  334. default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
  335. default SYS_CCSRBAR_DEFAULT
  336. help
  337. Address for the Internal Memory-Mapped Registers (IMMR) window used
  338. to configure the features of many Freescale / NXP SoCs.
  339. config SKIP_LOWLEVEL_INIT
  340. bool "Skip the calls to certain low level initialization functions"
  341. depends on ARM || NDS32 || MIPS || RISCV
  342. help
  343. If enabled, then certain low level initializations (like setting up
  344. the memory controller) are omitted and/or U-Boot does not relocate
  345. itself into RAM.
  346. Normally this variable MUST NOT be defined. The only exception is
  347. when U-Boot is loaded (to RAM) by some other boot loader or by a
  348. debugger which performs these initializations itself.
  349. config SPL_SKIP_LOWLEVEL_INIT
  350. bool "Skip the calls to certain low level initialization functions"
  351. depends on SPL && (ARM || NDS32 || MIPS || RISCV)
  352. help
  353. If enabled, then certain low level initializations (like setting up
  354. the memory controller) are omitted and/or U-Boot does not relocate
  355. itself into RAM.
  356. Normally this variable MUST NOT be defined. The only exception is
  357. when U-Boot is loaded (to RAM) by some other boot loader or by a
  358. debugger which performs these initializations itself.
  359. config TPL_SKIP_LOWLEVEL_INIT
  360. bool "Skip the calls to certain low level initialization functions"
  361. depends on SPL && ARM
  362. help
  363. If enabled, then certain low level initializations (like setting up
  364. the memory controller) are omitted and/or U-Boot does not relocate
  365. itself into RAM.
  366. Normally this variable MUST NOT be defined. The only exception is
  367. when U-Boot is loaded (to RAM) by some other boot loader or by a
  368. debugger which performs these initializations itself.
  369. config SKIP_LOWLEVEL_INIT_ONLY
  370. bool "Skip the call to lowlevel_init during early boot ONLY"
  371. depends on ARM
  372. help
  373. This allows just the call to lowlevel_init() to be skipped. The
  374. normal CP15 init (such as enabling the instruction cache) is still
  375. performed.
  376. config SPL_SKIP_LOWLEVEL_INIT_ONLY
  377. bool "Skip the call to lowlevel_init during early boot ONLY"
  378. depends on SPL && ARM
  379. help
  380. This allows just the call to lowlevel_init() to be skipped. The
  381. normal CP15 init (such as enabling the instruction cache) is still
  382. performed.
  383. config TPL_SKIP_LOWLEVEL_INIT_ONLY
  384. bool "Skip the call to lowlevel_init during early boot ONLY"
  385. depends on TPL && ARM
  386. help
  387. This allows just the call to lowlevel_init() to be skipped. The
  388. normal CP15 init (such as enabling the instruction cache) is still
  389. performed.
  390. source "arch/arc/Kconfig"
  391. source "arch/arm/Kconfig"
  392. source "arch/m68k/Kconfig"
  393. source "arch/microblaze/Kconfig"
  394. source "arch/mips/Kconfig"
  395. source "arch/nds32/Kconfig"
  396. source "arch/nios2/Kconfig"
  397. source "arch/powerpc/Kconfig"
  398. source "arch/sandbox/Kconfig"
  399. source "arch/sh/Kconfig"
  400. source "arch/x86/Kconfig"
  401. source "arch/xtensa/Kconfig"
  402. source "arch/riscv/Kconfig"